From patchwork Mon Oct 7 14:59:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Weimer X-Patchwork-Id: 34849 Received: (qmail 41334 invoked by alias); 7 Oct 2019 14:59:47 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 41324 invoked by uid 89); 7 Oct 2019 14:59:46 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.4 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=schwab, Schwab, U*schwab, lightweight X-HELO: mx1.redhat.com From: Florian Weimer To: libc-alpha@sourceware.org Subject: [PATCH] ChangeLog: Remove leading spaces before tabs and trailing whitespace Date: Mon, 07 Oct 2019 16:59:42 +0200 Message-ID: <87v9t0iotd.fsf@oldenburg2.str.redhat.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.2 (gnu/linux) MIME-Version: 1.0 diff --git a/ChangeLog b/ChangeLog index 47f60ef725..e6e02aecae 100644 --- a/ChangeLog +++ b/ChangeLog @@ -455,7 +455,7 @@ CFLAGS-tst-sigcontext-get_pc.c. 2019-09-24 Alistair Francis - + * inet/net-internal.h: Fix uninitalised clntudp_call() variable. 2019-09-24 Andreas Schwab @@ -1058,42 +1058,42 @@ 2019-08-28 Paul A. Clarke - * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status_ISA300): Delete. - (fegetenv_status): Generate 'mffsl' unconditionally. + * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status_ISA300): Delete. + (fegetenv_status): Generate 'mffsl' unconditionally. 2019-08-28 Paul A. Clarke - * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Utilize lightweight - FPSCR read. - (_FPU_MASK_ALL): Delete. + * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Utilize lightweight + FPSCR read. + (_FPU_MASK_ALL): Delete. 2019-08-28 Paul A. Clarke - * sysdeps/powerpc/fpu/fenv_private.h (libc_feholdsetround_ppc_ctx): - Utilize lightweight FPSCR read if possible, set fewer FPSCR bits - if possible. - (libc_feresetround_ppc): Replace call to __libc_femergeenv_ppc - with simpler required steps, set fewer FPSCR bits if possible. + * sysdeps/powerpc/fpu/fenv_private.h (libc_feholdsetround_ppc_ctx): + Utilize lightweight FPSCR read if possible, set fewer FPSCR bits + if possible. + (libc_feresetround_ppc): Replace call to __libc_femergeenv_ppc + with simpler required steps, set fewer FPSCR bits if possible. 2019-08-28 Paul A. Clarke - * sysdeps/powerpc/fpu/fenv_libc.h (fesetenv_mode): New. - (FPSCR_FPRF_MASK): New. (FPSCR_STATUS_MASK): New. - * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Use lighter- - weight access to FPSCR; remove unnecessary second FPSCR read and - validate. - * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Likewise. - * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Use lighter-weight - access to FPSCR; Use macros in fenv_libc.h in favor of local. + * sysdeps/powerpc/fpu/fenv_libc.h (fesetenv_mode): New. + (FPSCR_FPRF_MASK): New. (FPSCR_STATUS_MASK): New. + * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Use lighter- + weight access to FPSCR; remove unnecessary second FPSCR read and + validate. + * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Likewise. + * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Use lighter-weight + access to FPSCR; Use macros in fenv_libc.h in favor of local. 2019-08-28 Paul A. Clarke - * sysdeps/powerpc/fpu/fenv_libc.h: Define FPSCR bitmasks. - (fenv_reg_to_exceptions): Replace bitwise operations with mask-shift. - (fenv_exceptions_to_reg): New. - * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Replace bitwise - operation with call to fenv_exceptions_to_reg(). - * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise. + * sysdeps/powerpc/fpu/fenv_libc.h: Define FPSCR bitmasks. + (fenv_reg_to_exceptions): Replace bitwise operations with mask-shift. + (fenv_exceptions_to_reg): New. + * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Replace bitwise + operation with call to fenv_exceptions_to_reg(). + * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise. 2019-08-28 Florian Weimer