diff mbox series

i386: Explain why __HAVE_64B_ATOMICS has to be 0

Message ID 87mtmmgb52.fsf@oldenburg.str.redhat.com
State Committed
Commit cca75bd8b53b82d80299b03b368355b158832c9a
Headers show
Series i386: Explain why __HAVE_64B_ATOMICS has to be 0 | expand

Checks

Context Check Description
dj/TryBot-apply_patch success Patch applied to master at the time it was sent
dj/TryBot-32bit success Build for i686

Commit Message

Florian Weimer Nov. 2, 2021, 9:27 a.m. UTC
---
 sysdeps/x86/atomic-machine.h | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Adhemerval Zanella Nov. 2, 2021, 11:26 a.m. UTC | #1
LGTM, thanks.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>

On 02/11/2021 06:27, Florian Weimer via Libc-alpha wrote:
> ---
>  sysdeps/x86/atomic-machine.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/sysdeps/x86/atomic-machine.h b/sysdeps/x86/atomic-machine.h
> index 695222e4fa..2692d94a92 100644
> --- a/sysdeps/x86/atomic-machine.h
> +++ b/sysdeps/x86/atomic-machine.h
> @@ -60,6 +60,10 @@ typedef uintmax_t uatomic_max_t;
>  # define BR_CONSTRAINT			"q"
>  # define IBR_CONSTRAINT			"iq"
>  #else
> +/* Since the Pentium, i386 CPUs have supported 64-bit atomics, but the
> +   i386 psABI supplement provides only 4-byte alignment for uint64_t
> +   inside structs, so it is currently not possible to use 64-bit
> +   atomics on this platform.  */
>  # define __HAVE_64B_ATOMICS		0
>  # define SP_REG				"esp"
>  # define SEG_REG			"gs"
>
diff mbox series

Patch

diff --git a/sysdeps/x86/atomic-machine.h b/sysdeps/x86/atomic-machine.h
index 695222e4fa..2692d94a92 100644
--- a/sysdeps/x86/atomic-machine.h
+++ b/sysdeps/x86/atomic-machine.h
@@ -60,6 +60,10 @@  typedef uintmax_t uatomic_max_t;
 # define BR_CONSTRAINT			"q"
 # define IBR_CONSTRAINT			"iq"
 #else
+/* Since the Pentium, i386 CPUs have supported 64-bit atomics, but the
+   i386 psABI supplement provides only 4-byte alignment for uint64_t
+   inside structs, so it is currently not possible to use 64-bit
+   atomics on this platform.  */
 # define __HAVE_64B_ATOMICS		0
 # define SP_REG				"esp"
 # define SEG_REG			"gs"