From patchwork Tue Apr 23 19:01:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Florian Weimer X-Patchwork-Id: 88929 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 267F33849AC3 for ; Tue, 23 Apr 2024 19:01:44 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id 3EC75385840D for ; Tue, 23 Apr 2024 19:01:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3EC75385840D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3EC75385840D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713898881; cv=none; b=PHyIYStFiiipD4Yv2XtbmANYdZJvfpJfZuf8+C+WAQlciMi2QvULb7L0MH7xdVyfA6tuXvSUV79XJUg8XP3/SqUOp3Pdzqwm86BcygrQP04h6GUrC/QEC5RHFbJUhae3EFVyK9zh22c43cbDkC892pGubWW3f7KtlEmQdCrQ2TA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713898881; c=relaxed/simple; bh=HFnHEPb6R5Ar2P/3B65WqLdPuqHeddnVLPqmwmE38QA=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=qYVkf3itgl5QKujdd3Y5c29GzwOJMWdSQYN6c6oIo9IHLD7oUIAs0gXunIfCLqvPZ89pUByMD8v1ycg0P088F6nlUsAvuvUxoKPt9/opotHp3EKjaqe38ONHRFgw6pqrBFFMcuBpe8b6l0I3cH6bZ1W7U45C23fZH2NCpJyAnyQ= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1713898878; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=cC2OGlQQB1HG4ylBfH7ZixqluRYO9vXCc186AoSCGvk=; b=GrX7fNs6PYlB82fx+pr4ctIQ98g903aUe5qNkdX5tTMBWza3Z4lGY4g49uulPPDBqRxM0K L7TmKySBI6JdxYTejVkfXL+XJ8ExusVyv/b6oOdiltFiVpukH5snZRUVJyBrcjcC68RhZ/ KWFmVEL7NI/i+lnB+vYUaXlIASXfaOs= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-649-gnIhw9Z8NTqZchPx5ty3pA-1; Tue, 23 Apr 2024 15:01:17 -0400 X-MC-Unique: gnIhw9Z8NTqZchPx5ty3pA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 8C9FC3C108C7; Tue, 23 Apr 2024 19:01:16 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.39.192.74]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4E4752166B31; Tue, 23 Apr 2024 19:01:15 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Cc: "H.J. Lu" , Sunil K Pandey Subject: Computing x86 ISA level at configure time Date: Tue, 23 Apr 2024 21:01:13 +0200 Message-ID: <874jbrc39i.fsf@oldenburg.str.redhat.com> User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.6 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org I'm trying to build glibc with these configure arguments: CC="gcc -march=x86-64-v3" CXX="g++ -march=x86-64-v3" \ --with-rtld-early-cflags=-march=x86-64 It does not quite work because the ld.so trampolines are now initialized early, and at that point, -march=x86-64 is in effect. I tried to move the computation to the configure state, so that it is frozen using the default (not early) CC/CFLAGS combination. I've got a prototype patch, but I've trouble understanding the meaning of “baseline” vs the other options. Any suggestions how to proceed? Thanks, Florian diff --git a/config.h.in b/config.h.in index 69ac450356..602dd639eb 100644 --- a/config.h.in +++ b/config.h.in @@ -285,6 +285,9 @@ /* Define if x86 ISA level should be included in shared libraries. */ #undef INCLUDE_X86_ISA_LEVEL +/* The x86-64 ISA level. 0 for baseline. Undefined on non-x86-64. */ +#undef MINIMUM_X86_ISA_LEVEL + /* Define if -msahf is enabled by default on x86. */ #undef HAVE_X86_LAHF_SAHF diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure index 2a5421bb31..559adaa1c7 100644 --- a/sysdeps/x86/configure +++ b/sysdeps/x86/configure @@ -131,26 +131,61 @@ if test ${libc_cv_have_x86_isa_level+y} then : printf %s "(cached) " >&6 else $as_nop - cat > conftest.c < -#if MINIMUM_X86_ISA_LEVEL >= 4 -libc_cv_have_x86_isa_level=4 -#elif MINIMUM_X86_ISA_LEVEL == 3 -libc_cv_have_x86_isa_level=3 -#elif MINIMUM_X86_ISA_LEVEL == 2 -libc_cv_have_x86_isa_level=2 + cat > conftest.c <<'EOF' +#if defined __SSE__ && defined __SSE2__ +/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ +# define __X86_ISA_V1 1 #else -libc_cv_have_x86_isa_level=baseline +# define __X86_ISA_V1 0 #endif + +#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ + && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__ \ + && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__ +/* NB: ISAs in x86-64 ISA level v2 are used. */ +# define __X86_ISA_V2 1 +#else +# define __X86_ISA_V2 0 +#endif + +#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ + && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ + && defined __BMI__ && defined __BMI2__ +/* NB: ISAs in x86-64 ISA level v3 are used. */ +# define __X86_ISA_V3 1 +#else +# define __X86_ISA_V3 0 +#endif + +#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ + && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__ +/* NB: ISAs in x86-64 ISA level v4 are used. */ +# define __X86_ISA_V4 1 +#else +# define __X86_ISA_V4 0 +#endif + +void +emit_constant () +{ + asm ("/* libc_cv_have_x86_isa_level=%c0 */" + :: "i" (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4)); +} EOF - eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level` +${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=0-9' + eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=0-9'` rm -rf conftest* fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_have_x86_isa_level" >&5 printf "%s\n" "$libc_cv_have_x86_isa_level" >&6; } + if test -z "$libc_cv_have_x86_isa_level" ; then + as_fn_error $? "Could not determine x86 ISA level" "$LINENO" 5 + fi else - libc_cv_have_x86_isa_level=baseline + libc_cv_have_x86_isa_level=0 fi +printf "%s\n" "#define MINIMUM_X86_ISA_LEVEL $libc_cv_have_x86_isa_level" >>confdefs.h + config_vars="$config_vars have-x86-isa-level = $libc_cv_have_x86_isa_level" config_vars="$config_vars diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac index 78ff7c8f41..f9ba5f583e 100644 --- a/sysdeps/x86/configure.ac +++ b/sysdeps/x86/configure.ac @@ -88,23 +88,57 @@ if test $libc_cv_include_x86_isa_level = yes; then # Check for ISA level support. AC_CACHE_CHECK([for ISA level support], libc_cv_have_x86_isa_level, [dnl -cat > conftest.c < -#if MINIMUM_X86_ISA_LEVEL >= 4 -libc_cv_have_x86_isa_level=4 -#elif MINIMUM_X86_ISA_LEVEL == 3 -libc_cv_have_x86_isa_level=3 -#elif MINIMUM_X86_ISA_LEVEL == 2 -libc_cv_have_x86_isa_level=2 +cat > conftest.c <<'EOF' +#if defined __SSE__ && defined __SSE2__ +/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ +# define __X86_ISA_V1 1 #else -libc_cv_have_x86_isa_level=baseline +# define __X86_ISA_V1 0 #endif + +#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ + && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__ \ + && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__ +/* NB: ISAs in x86-64 ISA level v2 are used. */ +# define __X86_ISA_V2 1 +#else +# define __X86_ISA_V2 0 +#endif + +#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ + && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ + && defined __BMI__ && defined __BMI2__ +/* NB: ISAs in x86-64 ISA level v3 are used. */ +# define __X86_ISA_V3 1 +#else +# define __X86_ISA_V3 0 +#endif + +#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ + && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__ +/* NB: ISAs in x86-64 ISA level v4 are used. */ +# define __X86_ISA_V4 1 +#else +# define __X86_ISA_V4 0 +#endif + +void +emit_constant () +{ + asm ("/* libc_cv_have_x86_isa_level=%c0 */" + :: "i" (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4)); +} EOF - eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level` +${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=[0-9]' + eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=[0-9]'` rm -rf conftest*]) + if test -z "$libc_cv_have_x86_isa_level" ; then + AC_MSG_ERROR([Could not determine x86 ISA level]) + fi else - libc_cv_have_x86_isa_level=baseline + libc_cv_have_x86_isa_level=0 fi +AC_DEFINE_UNQUOTED([MINIMUM_X86_ISA_LEVEL], [$libc_cv_have_x86_isa_level]) LIBC_CONFIG_VAR([have-x86-isa-level], [$libc_cv_have_x86_isa_level]) LIBC_CONFIG_VAR([x86-isa-level-3-or-above], [3 4]) LIBC_CONFIG_VAR([enable-x86-isa-level], [$libc_cv_include_x86_isa_level]) diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h index 11fe1ca90c..c116ded2d8 100644 --- a/sysdeps/x86/isa-level.h +++ b/sysdeps/x86/isa-level.h @@ -28,42 +28,6 @@ #ifndef _ISA_LEVEL_H #define _ISA_LEVEL_H -#if defined __SSE__ && defined __SSE2__ -/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ -# define __X86_ISA_V1 1 -#else -# define __X86_ISA_V1 0 -#endif - -#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ - && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__ \ - && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__ -/* NB: ISAs in x86-64 ISA level v2 are used. */ -# define __X86_ISA_V2 1 -#else -# define __X86_ISA_V2 0 -#endif - -#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ - && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ - && defined __BMI__ && defined __BMI2__ -/* NB: ISAs in x86-64 ISA level v3 are used. */ -# define __X86_ISA_V3 1 -#else -# define __X86_ISA_V3 0 -#endif - -#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ - && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__ -/* NB: ISAs in x86-64 ISA level v4 are used. */ -# define __X86_ISA_V4 1 -#else -# define __X86_ISA_V4 0 -#endif - -#define MINIMUM_X86_ISA_LEVEL \ - (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4) - /* Depending on the minimum ISA level, a feature check result can be a compile-time constant.. */