From patchwork Thu Aug 29 16:50:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 34347 Received: (qmail 5909 invoked by alias); 29 Aug 2019 16:55:01 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 5770 invoked by uid 89); 29 Aug 2019 16:55:01 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT autolearn=ham version=3.3.1 spammy= X-HELO: esa3.hgst.iphmx.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1567097699; x=1598633699; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7Q/DmwiMfsxfFcn3iDOjVmPClQwJhhprC1zOAUZsWjk=; b=eXy6FzlxQnGHOvrE5NKcBHO//WpP3WauMoYIdXoWcjeoNu2mHAgNyGf9 D8xcOoEnvSxBJ+TbUoZJLEb4JOzJYVbzd0DLj64A0CD4otGixcYLV0yfi UKtOSDZTOs6wwfw4v4xQKxfPlmOpqFadjKE1u2Oj0UHGs/6Dqke2SNeGm g7gDVEnEDmfC06c5XTzGKLDLHHC438HVSNuViZbc6jJkE0yPjCGY3IOyQ WDCqIliHPUaPRK99X11uEc41aXH8sd+yk3tHMlbx2nRhqfpfGdZl0j4qJ Ohk72WTzU2MvpOqowRXtpfq/rz5y1UNdtBHK9LKqi8Q99CTs8cfSU6jdx w==; IronPort-SDR: QtoflWByjQzahUX3Y8Ba9I4PdP5gmJxfViS4ukkAt6FyCsu2EI1I+L5JWuAAbRJNt6voWzbmnD HEOIou0/72gQjpZn1XdOw86kqoYcCAi1/lV85JnoArCTF3lEWDyCkQxr4HvZQ7dtbJQqgZ29Fc QlNDJb2Oy5RRUMsj8czWaoUSiTv374XvvT7Y6B21wD3v3QwFj0yJ0GMcIjJVAjxvlSaQOKQms4 QKx6yAzG3ywI92/lihrkfBhD4O0xm+M1bkm80vNYyIsB72JJQyf9LN/I+BOuzsRAVc9AJUHPUV o84= IronPort-SDR: j+2Js3ZsraCys2EKK2Wh04N7AM0lWR3E60rm7bbHniBaElu2wcy5mP9LXIb91+PKcRKQaspEGZ iGIldzHgD5BOs7lwRyD1yzZCOUxXOcBk+rINKAGu39xovgOpEPHQ9q3SdClfdB09TpeUwskWdn 0PkOzUPWGsVBIUUS4kRgpALLzC6vVM+s7x4eku7e4SUc5hnvA0h6+30VkFtVGWm2+gsYzPYnIH 5TYdyitAiBpSAfIURkiZluw2+OtkiKnbL0s2IrMUOGEQl+5Q9d50vl04QRdGP5SSFgWpX9esTw Mi8q/dVw+eucvJZbxTElZx1E IronPort-SDR: uWdaFJ1pmrpJAYgxE0i5l24nODnTGlNitD0Gn4ecNMJcgPg71aJoAhVwFFombIPXRz9N9HjlFi 077tuL2iMItYKNOiyiqHkdT+ael2rtqHI9YszrXdgrkvblDI4b0G8gnO7owTgoijIDUNV562Om hWwk2CgTQXHwTiT45Wj21rlNsaUkngfmAYcpawtlIW+lRZTI4uuo15R06sQq/43MYbUNDMB6Yu J5o1x8zRdnXNxpOsTsCcduTqFOlnczqs7xf5ycCOnY/mKlJsV+UQtu/FoglFFLDWTShjLWvELz LtY= WDCIronportException: Internal From: Alistair Francis To: libc-alpha@sourceware.org Cc: arnd@arndb.de, adhemerval.zanella@linaro.org, fweimer@redhat.com, palmer@sifive.com, macro@wdc.com, zongbox@gmail.com, alistair.francis@wdc.com, alistair23@gmail.com Subject: [RFC v5 15/21] RISC-V: The ABI implementation for the 32-bit Date: Thu, 29 Aug 2019 09:50:40 -0700 Message-Id: <818ed60269a3fe3da6f925e79fc64b882ed74d21.1567097252.git.alistair.francis@wdc.com> In-Reply-To: References: MIME-Version: 1.0 From: Zong Li This patch adds the ABI implementation about 32 bit version. It contains the Linux-specific and RISC-V architecture code, I've collected here. 2018-11-29 Zong Li * sysdeps/riscv/bits/wordsize.h: Supprt rv32. * sysdeps/riscv/nptl/bits/pthreadtypes-arch.h: Likewise. * sysdeps/riscv/sfp-machine.h: Likewise. * sysdeps/riscv/sys/asm.h: Likewise. * sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h: New file. [ Changes by AF: - Remove lock64.c ] Signed-off-by: Alistair Francis --- sysdeps/riscv/bits/wordsize.h | 4 +- sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 25 ++++++++- sysdeps/riscv/sfp-machine.h | 27 +++++++++- sysdeps/riscv/sys/asm.h | 5 +- .../sysv/linux/riscv/rv32/jmp_buf-macros.h | 53 +++++++++++++++++++ 5 files changed, 110 insertions(+), 4 deletions(-) create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h index 0b8cd8fefdb..f10be0144c4 100644 --- a/sysdeps/riscv/bits/wordsize.h +++ b/sysdeps/riscv/bits/wordsize.h @@ -25,5 +25,7 @@ #if __riscv_xlen == 64 # define __WORDSIZE_TIME64_COMPAT32 1 #else -# error "rv32i-based targets are not supported" +# define __WORDSIZE_TIME64_COMPAT32 0 +# define __WORDSIZE32_SIZE_ULONG 0 +# define __WORDSIZE32_PTRDIFF_LONG 0 #endif diff --git a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h index e3fecc32082..4b08f7c692b 100644 --- a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h +++ b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h @@ -32,7 +32,15 @@ # define __SIZEOF_PTHREAD_BARRIER_T 32 # define __SIZEOF_PTHREAD_BARRIERATTR_T 4 #else -# error "rv32i-based systems are not supported" +# define __SIZEOF_PTHREAD_ATTR_T 32 +# define __SIZEOF_PTHREAD_MUTEX_T 32 +# define __SIZEOF_PTHREAD_MUTEXATTR_T 4 +# define __SIZEOF_PTHREAD_COND_T 48 +# define __SIZEOF_PTHREAD_CONDATTR_T 4 +# define __SIZEOF_PTHREAD_RWLOCK_T 48 +# define __SIZEOF_PTHREAD_RWLOCKATTR_T 8 +# define __SIZEOF_PTHREAD_BARRIER_T 20 +# define __SIZEOF_PTHREAD_BARRIERATTR_T 4 #endif #define __PTHREAD_COMPAT_PADDING_MID @@ -56,11 +64,26 @@ struct __pthread_rwlock_arch_t unsigned int __writers_futex; unsigned int __pad3; unsigned int __pad4; +#if __riscv_xlen == 64 int __cur_writer; int __shared; unsigned long int __pad1; unsigned long int __pad2; unsigned int __flags; +#else +# if __BYTE_ORDER == __BIG_ENDIAN + unsigned char __pad1; + unsigned char __pad2; + unsigned char __shared; + unsigned char __flags; +# else + unsigned char __flags; + unsigned char __shared; + unsigned char __pad1; + unsigned char __pad2; +# endif + int __cur_writer; +#endif }; #define __PTHREAD_RWLOCK_ELISION_EXTRA 0 diff --git a/sysdeps/riscv/sfp-machine.h b/sysdeps/riscv/sfp-machine.h index fa0b8fa41a1..98e1f84370d 100644 --- a/sysdeps/riscv/sfp-machine.h +++ b/sysdeps/riscv/sfp-machine.h @@ -22,7 +22,32 @@ #if __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define _FP_W_TYPE_SIZE 32 +# define _FP_W_TYPE unsigned long +# define _FP_WS_TYPE signed long +# define _FP_I_TYPE long + +# define _FP_MUL_MEAT_S(R, X, Y) \ + _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_D(R, X, Y) \ + _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_Q(R, X, Y) \ + _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_MUL_MEAT_DW_S(R, X, Y) \ + _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_D(R, X, Y) \ + _FP_MUL_MEAT_DW_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_Q(R, X, Y) \ + _FP_MUL_MEAT_DW_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y) +# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y) +# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D, 0 +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 #else diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h index b8f90a44cea..7ea34afd6d1 100644 --- a/sysdeps/riscv/sys/asm.h +++ b/sysdeps/riscv/sys/asm.h @@ -26,7 +26,10 @@ # define REG_S sd # define REG_L ld #elif __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define PTRLOG 2 +# define SZREG 4 +# define REG_S sw +# define REG_L lw #else # error __riscv_xlen must equal 32 or 64 #endif diff --git a/sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h b/sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h new file mode 100644 index 00000000000..e0042b9f01b --- /dev/null +++ b/sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h @@ -0,0 +1,53 @@ +/* jump buffer constants for RISC-V + Copyright (C) 2017-2018 Free Software Foundation, Inc. + + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +/* Produced by this program: + + #include + #include + #include + #include + + int main (int argc, char **argv) + { + printf ("#define JMP_BUF_SIZE %d\n", sizeof (jmp_buf)); + printf ("#define JMP_BUF_ALIGN %d\n", __alignof__ (jmp_buf)); + printf ("#define SIGJMP_BUF_SIZE %d\n", sizeof (sigjmp_buf)); + printf ("#define SIGJMP_BUF_ALIGN %d\n", __alignof__ (sigjmp_buf)); + printf ("#define MASK_WAS_SAVED_OFFSET %d\n", offsetof (struct __jmp_buf_tag, __mask_was_saved)); + printf ("#define SAVED_MASK_OFFSET %d\n", offsetof (struct __jmp_buf_tag, __saved_mask)); + } */ + +#if defined __riscv_float_abi_soft +# define JMP_BUF_SIZE 188 +# define JMP_BUF_ALIGN 4 +# define SIGJMP_BUF_SIZE 188 +# define SIGJMP_BUF_ALIGN 4 +# define MASK_WAS_SAVED_OFFSET 56 +# define SAVED_MASK_OFFSET 60 +#elif defined __riscv_float_abi_double +# define JMP_BUF_SIZE 288 +# define JMP_BUF_ALIGN 8 +# define SIGJMP_BUF_SIZE 288 +# define SIGJMP_BUF_ALIGN 8 +# define MASK_WAS_SAVED_OFFSET 152 +# define SAVED_MASK_OFFSET 156 +#else +# error "Unknown RISC-V floating-point ABI" +#endif