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[v4,17/18] Documentation for the RISC-V 32-bit port

Message ID	6b04040addd0fe87cb349b5b1b9cda14e38f74b2.1597243100.git.alistair.francis@wdc.com
State	Committed
Headers	DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org EA6D8384A882 IronPort-SDR: n4YQHGMAeKN0B0La+7G/IKKkmo8XhGL4bpZVoB/jcYw6v//oN2266PFIH15jaRIKfrn4aNIVN/ pjbnQzZ80ij/CSQ0oo+5IF2j7rboBH5qfnN4RAaUgIMR0c3U9lcq9knCm3F9X/uhCkyIYmvCYn tmJt4g6RQ/2QYcWDIV0WgySscORX9BUfBiaTyO7YW/eC8aU01/naOlOx9cnUFICx2WfPdTpY+3 m5YAWn3y4ZPQJ8viSBh8L3kgzSd0Lden8HQYBGGVkDEIt8b2iKeo2JQetCgdDK3t157398WWIe YTM= IronPort-SDR: nCpr7Q+LNEYzpjHAQ3oAIBb4GVRfboqRydGI1pqsBNyWSzpfxIYvpsm1z2I9+dOSlKrg2OBk+8 Gg2rDnQPrEmw== IronPort-SDR: 1pkYe5JDnuGVoCjGEPTtziEZVheIf+PjXgtDbAAnrmA2I1kk38+uePwwrtsV5NANesZ1PC4lMA 92XEDfuywmBA== WDCIronportException: Internal To: libc-alpha@sourceware.org Subject: [PATCH v4 17/18] Documentation for the RISC-V 32-bit port Date: Wed, 12 Aug 2020 07:42:01 -0700 Message-Id: <6b04040addd0fe87cb349b5b1b9cda14e38f74b2.1597243100.git.alistair.francis@wdc.com> In-Reply-To: <cover.1597243100.git.alistair.francis@wdc.com> References: <cover.1597243100.git.alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org> Reply-To: Alistair Francis <alistair.francis@wdc.com> Cc: macro@wdc.com, alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org>
Series	glibc port for 32-bit RISC-V (RV32) \| [v4,00/18] glibc port for 32-bit RISC-V (RV32) [v4,01/18] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 [v4,02/18] RISC-V: Cleanup some of the sysdep.h code [v4,03/18] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port [v4,04/18] RISC-V: Add support for 32-bit vDSO calls [v4,05/18] RISC-V: Support dynamic loader for the 32-bit [v4,07/18] sysv/linux: riscv: Fix dl-cache.h indentation [v4,08/18] RISC-V: Add arch-syscall.h for RV32 [v4,09/18] RISC-V: Support the 32-bit ABI implementation [v4,10/18] RISC-V: Hard float support for 32-bit [v4,11/18] RISC-V: Add 32-bit ABI lists [v4,12/18] RISC-V: Add the RV32 libm-test-ulps [v4,13/18] RISC-V: Fix llrint and llround missing exceptions on RV32 [v4,14/18] riscv32: Specify the arch_minimum_kernel as 5.4 [v4,16/18] RISC-V: Add rv32 path to RTLDLIST in ldd [v4,17/18] Documentation for the RISC-V 32-bit port [v4,18/18] Add RISC-V 32-bit target to build-many-glibcs.py

Commit Message

Alistair Francis Aug. 12, 2020, 2:42 p.m. UTC

  There is already RISC-V 64-bit port information in the documentation.
Let's add some documentation entries for the RISC-V 32-bit as well.
---
 NEWS   | 9 ++++++++-
 README | 1 +
 2 files changed, 9 insertions(+), 1 deletion(-)

Comments

Maciej W. Rozycki Aug. 18, 2020, 11:59 p.m. UTC | #1

On Wed, 12 Aug 2020, Alistair Francis wrote:

> diff --git a/NEWS b/NEWS
> index 2937adc3f3..c039a7aede 100644
> --- a/NEWS
> +++ b/NEWS
> @@ -9,7 +9,14 @@ Version 2.33
>  
>  Major new features:
>  
> -  [Add new features here]
> +* Support for the RISC-V ISA running on Linux has been expanded to run on
> +  32-bit hardware.  This requires at least Linux 5.4 and is supported for
> +  the following ISA and ABI pairs:
> +    - rv32imac ilp32
> +    - rv32imafdc ilp32
> +    - rv32imafdc ilp32d
> +  The 32-bit RISC-V port requires the Linux kernel 5.4+, GCC 7.1+ and
> +  binutils 2.28+.

 This repeats the Linux version, and I think the use of "+" in version 
numbers qualifies as slang we would better avoid in such a user-visible 
document (well, there's no previous such use here ever anyway).  We also 
seem to avoid the use of "kernel" in references to Linux versions here.

 How about:

* Support for the RISC-V ISA running on Linux has been expanded to run on
  32-bit hardware.  This is supported for the following ISA and ABI pairs:

    - rv32imac ilp32
    - rv32imafdc ilp32
    - rv32imafdc ilp32d

  The 32-bit RISC-V port requires at least Linux 5.4, GCC 7.1 and binutils 
  2.28.

then?

  Maciej

diff mbox series

Patch

diff --git a/NEWS b/NEWS
index 2937adc3f3..c039a7aede 100644
--- a/NEWS
+++ b/NEWS
@@ -9,7 +9,14 @@  Version 2.33
 
 Major new features:
 
-  [Add new features here]
+* Support for the RISC-V ISA running on Linux has been expanded to run on
+  32-bit hardware.  This requires at least Linux 5.4 and is supported for
+  the following ISA and ABI pairs:
+    - rv32imac ilp32
+    - rv32imafdc ilp32
+    - rv32imafdc ilp32d
+  The 32-bit RISC-V port requires the Linux kernel 5.4+, GCC 7.1+ and
+  binutils 2.28+.
 
 Deprecated and removed features, and other changes affecting compatibility:
 
diff --git a/README b/README
index 903f07e484..d0f0edb393 100644
--- a/README
+++ b/README
@@ -39,6 +39,7 @@  The GNU C Library supports these configurations for using Linux kernels:
 	powerpc64*-*-linux-gnu	Big-endian and little-endian.
 	s390-*-linux-gnu
 	s390x-*-linux-gnu
+	riscv32-*-linux-gnu
 	riscv64-*-linux-gnu
 	sh[34]-*-linux-gnu
 	sparc*-*-linux-gnu