From patchwork Thu Aug 13 21:21:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul E. Murphy" X-Patchwork-Id: 8187 X-Patchwork-Delegate: tuliom@linux.vnet.ibm.com Received: (qmail 106779 invoked by alias); 13 Aug 2015 21:21:12 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 106768 invoked by uid 89); 13 Aug 2015 21:21:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e19.ny.us.ibm.com X-MailFrom: murphyp@linux.vnet.ibm.com X-RcptTo: libc-alpha@sourceware.org Message-ID: <55CD0A41.6000002@linux.vnet.ibm.com> Date: Thu, 13 Aug 2015 16:21:05 -0500 From: "Paul E. Murphy" User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: "libc-alpha@sourceware.org" CC: Steve Munroe , Tulio Magno Quites Machado Filho Subject: [PATCH] powerpc: Revert to default atomic ops in elision code X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15081321-0057-0000-0000-0000010EF8E8 Power ISA 2.07B section B.5.5 relaxed the barrier requirement around a TLE enabled lock. It is now identical to a traditional lock. 2015-08-07 Paul E. Murphy * sysdeps/unix/sysv/linux/powerpc/elision-lock.c (__arch_compare_and_exchange_val_32_acq): Remove and use common definition. ISA 2.07B no longer requires full sync. --- sysdeps/unix/sysv/linux/powerpc/elision-lock.c | 21 --------------------- 1 files changed, 0 insertions(+), 21 deletions(-) diff --git a/sysdeps/unix/sysv/linux/powerpc/elision-lock.c b/sysdeps/unix/sysv/linux/powerpc/elision-lock.c index 7f9bcc2..26d272e 100644 --- a/sysdeps/unix/sysv/linux/powerpc/elision-lock.c +++ b/sysdeps/unix/sysv/linux/powerpc/elision-lock.c @@ -23,27 +23,6 @@ #include #include "htm.h" -/* PowerISA 2.0.7 Section B.5.5 defines isync to be insufficient as a - barrier in acquire mechanism for HTM operations, a strong 'sync' is - required. */ -#undef __arch_compare_and_exchange_val_32_acq -#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - ({ \ - __typeof (*(mem)) __tmp; \ - __typeof (mem) __memp = (mem); \ - __asm __volatile ( \ - "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \ - " cmpw %0,%2\n" \ - " bne 2f\n" \ - " stwcx. %3,0,%1\n" \ - " bne- 1b\n" \ - "2: sync" \ - : "=&r" (__tmp) \ - : "b" (__memp), "r" (oldval), "r" (newval) \ - : "cr0", "memory"); \ - __tmp; \ - }) - #if !defined(LLL_LOCK) && !defined(EXTRAARG) /* Make sure the configuration code is always linked in for static libraries. */