From patchwork Fri May 15 10:29:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Szabolcs Nagy X-Patchwork-Id: 6736 Received: (qmail 85298 invoked by alias); 15 May 2015 10:29:40 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 85236 invoked by uid 89); 15 May 2015 10:29:40 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL, BAYES_40, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Message-ID: <5555CA8C.6030000@arm.com> Date: Fri, 15 May 2015 11:29:32 +0100 From: Szabolcs Nagy User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: GNU C Library CC: Marcus Shawcroft Subject: [PATCH][AArch64] make setcontext etc functions consistent with the kernel X-MC-Unique: phJSpT4xQwyOK9g4xOT8hw-1 since https://sourceware.org/ml/libc-alpha/2014-04/msg00006.html setcontext etc is no longer tied to the kernel use of ucontext. in that patch the ucontext reserved space is not used consistently with the kernel abi: the d8,d9 pair is saved in the slot of q8. this is ok (*context functions work together), but probably not desirable (ucontexts created by the kernel and getcontext are subtly different). the fix just replaces dN with qN in the save/restore code, which does a bit more than needed (saves/restores the top half of qN that is not callee saved), but this should not be an issue (and avoids having to deal with endianness). (kernel fpsimd context layout: the first 64bit contains 0x210 the fpsimd context size and 0x46508001 the FPSIMD_MAGIC, the second 64bit is for fpsr and fpcr, and the rest is the 128bit q0..q31 registers). given d8=8.1, d9=9.1,... d15=15.1, the context created by getcontext is current: (gdb) x/40xg ctx.uc_mcontext.__reserved 0x410df0 : 0x0000021046508001 0x0000000000000000 0x410e00 : 0x0000000000000000 0x0000000000000000 0x410e10 : 0x0000000000000000 0x0000000000000000 0x410e20 : 0x0000000000000000 0x0000000000000000 0x410e30 : 0x0000000000000000 0x0000000000000000 0x410e40 : 0x0000000000000000 0x0000000000000000 0x410e50 : 0x0000000000000000 0x0000000000000000 0x410e60 : 0x0000000000000000 0x0000000000000000 0x410e70 : 0x0000000000000000 0x0000000000000000 0x410e80 : 0x4020333333333333 0x4022333333333333 0x410e90 : 0x0000000000000000 0x0000000000000000 0x410ea0 : 0x4024333333333333 0x4026333333333333 0x410eb0 : 0x0000000000000000 0x0000000000000000 0x410ec0 : 0x4028333333333333 0x402a333333333333 0x410ed0 : 0x0000000000000000 0x0000000000000000 0x410ee0 : 0x402c333333333333 0x402e333333333333 0x410ef0 : 0x0000000000000000 0x0000000000000000 0x410f00 : 0x0000000000000000 0x0000000000000000 0x410f10 : 0x0000000000000000 0x0000000000000000 0x410f20 : 0x0000000000000000 0x0000000000000000 fixed: (gdb) x/40xg ctx.uc_mcontext.__reserved 0x410d70 : 0x0000021046508001 0x0000000000000000 0x410d80 : 0x0000000000000000 0x0000000000000000 0x410d90 : 0x0000000000000000 0x0000000000000000 0x410da0 : 0x0000000000000000 0x0000000000000000 0x410db0 : 0x0000000000000000 0x0000000000000000 0x410dc0 : 0x0000000000000000 0x0000000000000000 0x410dd0 : 0x0000000000000000 0x0000000000000000 0x410de0 : 0x0000000000000000 0x0000000000000000 0x410df0 : 0x0000000000000000 0x0000000000000000 0x410e00 : 0x4020333333333333 0x0000000000000000 0x410e10 : 0x4022333333333333 0x0000000000000000 0x410e20 : 0x4024333333333333 0x0000000000000000 0x410e30 : 0x4026333333333333 0x0000000000000000 0x410e40 : 0x4028333333333333 0x0000000000000000 0x410e50 : 0x402a333333333333 0x0000000000000000 0x410e60 : 0x402c333333333333 0x0000000000000000 0x410e70 : 0x402e333333333333 0x0000000000000000 0x410e80 : 0x0000000000000000 0x0000000000000000 0x410e90 : 0x0000000000000000 0x0000000000000000 0x410ea0 : 0x0000000000000000 0x0000000000000000 Changelog: 2015-05-15 Szabolcs Nagy * sysdeps/unix/sysv/linux/aarch64/getcontext.S (__getcontext): Use q registers instead of d ones so the layout is kernel abi compatible. * sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Likewise. * sysdeps/unix/sysv/linux/aarch64/swapcontext.S (__swapcontext): Likewise. diff --git a/sysdeps/unix/sysv/linux/aarch64/getcontext.S b/sysdeps/unix/sysv/linux/aarch64/getcontext.S index adf8037..b72436f 100644 --- a/sysdeps/unix/sysv/linux/aarch64/getcontext.S +++ b/sysdeps/unix/sysv/linux/aarch64/getcontext.S @@ -69,10 +69,10 @@ ENTRY(__getcontext) /* Fill in the FP SIMD context. */ add x3, x2, #oV0 + 8 * SZVREG - stp d8, d9, [x3], # 2 * SZVREG - stp d10, d11, [x3], # 2 * SZVREG - stp d12, d13, [x3], # 2 * SZVREG - stp d14, d15, [x3], # 2 * SZVREG + stp q8, q9, [x3], # 2 * SZVREG + stp q10, q11, [x3], # 2 * SZVREG + stp q12, q13, [x3], # 2 * SZVREG + stp q14, q15, [x3], # 2 * SZVREG add x3, x2, oFPSR diff --git a/sysdeps/unix/sysv/linux/aarch64/setcontext.S b/sysdeps/unix/sysv/linux/aarch64/setcontext.S index 6dd7836..0bfaafd 100644 --- a/sysdeps/unix/sysv/linux/aarch64/setcontext.S +++ b/sysdeps/unix/sysv/linux/aarch64/setcontext.S @@ -97,10 +97,10 @@ ENTRY (__setcontext) /* Restore the FP SIMD context. */ add x3, x2, #oV0 + 8 * SZVREG - ldp d8, d9, [x3], #2 * SZVREG - ldp d10, d11, [x3], #2 * SZVREG - ldp d12, d13, [x3], #2 * SZVREG - ldp d14, d15, [x3], #2 * SZVREG + ldp q8, q9, [x3], #2 * SZVREG + ldp q10, q11, [x3], #2 * SZVREG + ldp q12, q13, [x3], #2 * SZVREG + ldp q14, q15, [x3], #2 * SZVREG add x3, x2, oFPSR diff --git a/sysdeps/unix/sysv/linux/aarch64/swapcontext.S b/sysdeps/unix/sysv/linux/aarch64/swapcontext.S index f62fc11..05ad8d3 100644 --- a/sysdeps/unix/sysv/linux/aarch64/swapcontext.S +++ b/sysdeps/unix/sysv/linux/aarch64/swapcontext.S @@ -54,10 +54,10 @@ ENTRY(__swapcontext) /* Fill in the FP SIMD context. */ add x3, x2, #oV0 + 8 * SZVREG - stp d8, d9, [x3], #2 * SZVREG - stp d10, d11, [x3], #2 * SZVREG - stp d12, d13, [x3], #2 * SZVREG - stp d14, d15, [x3], #2 * SZVREG + stp q8, q9, [x3], #2 * SZVREG + stp q10, q11, [x3], #2 * SZVREG + stp q12, q13, [x3], #2 * SZVREG + stp q14, q15, [x3], #2 * SZVREG add x3, x2, #oFPSR