From patchwork Wed Nov 5 13:11:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 3588 Received: (qmail 30517 invoked by alias); 5 Nov 2014 13:11:30 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 30507 invoked by uid 89); 5 Nov 2014 13:11:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_40, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: e24smtp03.br.ibm.com Message-ID: <545A21F8.8020808@linux.vnet.ibm.com> Date: Wed, 05 Nov 2014 11:11:20 -0200 From: Adhemerval Zanella User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: "GNU C. Library" Subject: [COMMITTED] powerpc: Simplify encoding of POWER8 instruction X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14110513-0009-0000-0000-00000235BF29 * sysdeps/powerpc/powerpc64/power8/memset.S (MTVSRD_V1_R4): Simplify definition. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S (MFVSRD_R3_V1): Likwise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S (MFVSRD_R3_V1): Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S (MFVSRD_R3_V1): Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S (MFVSRD_R3_V1): Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S (MFVSRD_R3_V1): Likewise. diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S index 2b27e7b..3e98126 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S @@ -17,14 +17,9 @@ . */ #include -#include #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __finite ([fp1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S index d09b7fc..125de39 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S @@ -17,14 +17,9 @@ . */ #include -#include #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __isinf([fp1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S index cf119e5..2c7b2d1 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S @@ -17,14 +17,9 @@ . */ #include -#include #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __isnan([f1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S index 9a55d93..ce48d4e 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S @@ -17,14 +17,9 @@ . */ #include -#include #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* long long int[r3] __llrint (double x[fp1]) */ ENTRY (__llrint) diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S index f10c06a..17cf30e 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S @@ -20,11 +20,7 @@ #include #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* long long [r3] llround (float x [fp1]) */ diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S index cebcbdf..d7324dc 100644 --- a/sysdeps/powerpc/powerpc64/power8/memset.S +++ b/sysdeps/powerpc/powerpc64/power8/memset.S @@ -17,13 +17,8 @@ . */ #include -#include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MTVSRD_V1_R4 .byte 0x66,0x01,0x24,0x7c /* mtvsrd v1,r4 */ -#else -#define MTVSRD_V1_R4 .byte 0x7c,0x24,0x01,0x66 -#endif +#define MTVSRD_V1_R4 .long 0x7c240166 /* mtvsrd v1,r4 */ /* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5])); Returns 's'. */