diff mbox series

[v4,18/18] Add RISC-V 32-bit target to build-many-glibcs.py

Message ID	4a9e808e94b4212ef437a88230f81f8cf2cf1e39.1597243100.git.alistair.francis@wdc.com
State	Committed
Headers	DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 9DFE1386191F IronPort-SDR: UMc490xAMioPVAY+RTR2HmrZqHB6eCLFFhAhk66rIuWWu4Lv41LBkbuDyYQ8TK2rKxN79jciZc l5KkKsDsEbulW3dbg/9xzSgwzDju9k61XUxsd27+xFa1KDdL9Wp55Fd3meMoEqIiXiyNgLSf1Y Y/hOTc079kaV2FPWlMLrLZO081ZtvcbXpwKKnLBet4ok2navi7DzU6brTDudEFmVYJQmW1A6EO U2QuoNE7/9RKfCzD6CUnDhF7XXsH3QFfYv7y4TGrcr4DwbQRnHnavisEqvpJqyubqgI2iA/ZJi +cg= IronPort-SDR: WIdYMLSIjeNRDM/s6d8qCNieeTF8MWC+JnpIBaX9jGcpZY/myu3B2KIg1na3LfY1Ceducvm571 CbBWGL7au2lg== IronPort-SDR: lTh7FimvPSfrqvP+KWPqTTJUSvoOnrgcW3FFTXKkV4rRRfnQmFHFKNNvtjdLH+/OsLA4DGpo7w FuvgCtSai6vg== WDCIronportException: Internal To: libc-alpha@sourceware.org Subject: [PATCH v4 18/18] Add RISC-V 32-bit target to build-many-glibcs.py Date: Wed, 12 Aug 2020 07:42:04 -0700 Message-Id: <4a9e808e94b4212ef437a88230f81f8cf2cf1e39.1597243100.git.alistair.francis@wdc.com> In-Reply-To: <cover.1597243100.git.alistair.francis@wdc.com> References: <cover.1597243100.git.alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org> Reply-To: Alistair Francis <alistair.francis@wdc.com> Cc: macro@wdc.com, alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org>
Series	glibc port for 32-bit RISC-V (RV32) \| [v4,00/18] glibc port for 32-bit RISC-V (RV32) [v4,01/18] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 [v4,02/18] RISC-V: Cleanup some of the sysdep.h code [v4,03/18] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port [v4,04/18] RISC-V: Add support for 32-bit vDSO calls [v4,05/18] RISC-V: Support dynamic loader for the 32-bit [v4,07/18] sysv/linux: riscv: Fix dl-cache.h indentation [v4,08/18] RISC-V: Add arch-syscall.h for RV32 [v4,09/18] RISC-V: Support the 32-bit ABI implementation [v4,10/18] RISC-V: Hard float support for 32-bit [v4,11/18] RISC-V: Add 32-bit ABI lists [v4,12/18] RISC-V: Add the RV32 libm-test-ulps [v4,13/18] RISC-V: Fix llrint and llround missing exceptions on RV32 [v4,14/18] riscv32: Specify the arch_minimum_kernel as 5.4 [v4,16/18] RISC-V: Add rv32 path to RTLDLIST in ldd [v4,17/18] Documentation for the RISC-V 32-bit port [v4,18/18] Add RISC-V 32-bit target to build-many-glibcs.py

Commit Message

Alistair Francis Aug. 12, 2020, 2:42 p.m. UTC

  From: Zong Li <zongbox@gmail.com>

Support building three variants of 32-bit RISC-V glibc as follows:
- riscv32-linux-gnu-rv32imac-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32d
---
 scripts/build-many-glibcs.py | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Maciej W. Rozycki Aug. 19, 2020, midnight UTC | #1

On Wed, 12 Aug 2020, Alistair Francis wrote:

> From: Zong Li <zongbox@gmail.com>
> 
> Support building three variants of 32-bit RISC-V glibc as follows:
> - riscv32-linux-gnu-rv32imac-ilp32
> - riscv32-linux-gnu-rv32imafdc-ilp32
> - riscv32-linux-gnu-rv32imafdc-ilp32d

 LGTM.

Reviewed-by: Maciej W. Rozycki <macro@wdc.com>

  Maciej

diff mbox series

Patch

diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py
index 325591b2c6..c7b2c84fce 100755
--- a/scripts/build-many-glibcs.py
+++ b/scripts/build-many-glibcs.py
@@ -347,6 +347,21 @@  class Context(object):
         self.add_config(arch='powerpc64le',
                         os_name='linux-gnu',
                         gcc_cfg=['--disable-multilib', '--enable-secureplt'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imac-ilp32',
+                        gcc_cfg=['--with-arch=rv32imac', '--with-abi=ilp32',
+                                 '--disable-multilib'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imafdc-ilp32',
+                        gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32',
+                                 '--disable-multilib'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imafdc-ilp32d',
+                        gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32d',
+                                 '--disable-multilib'])
         self.add_config(arch='riscv64',
                         os_name='linux-gnu',
                         variant='rv64imac-lp64',