From patchwork Sun Jan 12 10:34:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 37322 Received: (qmail 13368 invoked by alias); 12 Jan 2020 10:40:38 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 13311 invoked by uid 89); 12 Jan 2020 10:40:38 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT autolearn=ham version=3.3.1 spammy=floating-point, floatingpoint X-HELO: esa6.hgst.iphmx.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1578825636; x=1610361636; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jwt+/52YsT0J1FYkwbBAz6MDnA2fxPlgdxIjDdKvcD0=; b=RP/oIRqGK08t82HTS+p+w8oZeGBvb0+FMNBl6Co9O9oawB4UodZcvdap KNmqm2DunpxE+rTbUypEwCLgUKRE0Bdga4mSZWvrnNX+Kr9KB93gYLyRF fcGUaFCljcklUa15kfPLRINPRBXoxytPjmi5c3H43148V4VQJEkTe0bXJ Nw/xfp66o/7GEwGEHLWj71w/slvDGNMqW8mtFUoXVELCDqH4ho7jviqxK OnaN1YYUGF7jM4a3o4ioa/tvI4RGJBnGv4q/MXAwMZ5JHYAX3iLm6jvYC 0fk0kT89MdLzU+/KkB57GHdA19MjTrSO17zn2dUY/AA4ehqI/F7aIH+QI A==; IronPort-SDR: w+9HdhiocSUZSHy0GtrZOQaupoxgCr2G1XDkQL9BTAOuSY7GlfA9wbYpuRxuij7PgCys9CNvnt o9Usz3nfUUvf+jwGcfoX9D7IRcY1VrevQd0v2Dgb9Ww5VkttJ9VX7ikoW52x4jyCM38Rflllcb kTc0iFGyJEWRLwFbxBJDwcn+Ce3hSvRHfxykpIXDPvqQn/q+avgfAU7nZMaNit6cHW8sXBr/yC uS8o0vcEmxRhGWLncs8XhqFWF9a41+sf92xq6ppe7/5V5ZrdoDUfICkDgueoKG2EM3HDdDtIgQ rXY= IronPort-SDR: s3yU8e3I9U6R5PBHF1ErpddKwQRo6dbY+aeGnpddKyeMqgXpyr2+x7TkkFGGTeGk7ypIiUzakF iAJnaYiN9w9iCGvHgZwrKvbHrBXIUf2iS2XVI3f5tg55o6vRT1qwoACWcGnyE8EHbLlFnvsPqd nsys24uD5nViq9LBO+x8WgAQlRotfmanBTY/gKMKOfzXOveAVAQxQnx51CS1fQ+VulKoeaJamE KRJpo/mRMZKvSMVKrfZEhlmvFjOD++l4H9sIhdHv1KRVCeWDcAZahvNKbgD1nUMEwpAHasmxRP N+MLONeCKO/0O+fYmCSA3EE9 IronPort-SDR: nke+SHWM8S8P87r4m9qRxt18xPgaS7NFIT8oMFzS39uzny3KLthgzP1hOtw3O1VoEZomOGHQtr PafNRHvhywcGGASiGo7SMGjrn9v/7iY8xwldj0VaTR2M5QpqV5SZXwq78qqGDk0fayzBgH+R6C qxQffQp12lzIDqPdo0FnYkzfxhBTxdoqT39uDSrROFxhDj6kI17AxzmXueQfbpIR0uhSgNhDTs zErLxgVo9U8UPH4IPAsbYcOHg+VgG2HDtOMsGGgud5oROuSj0cJqTGD+E+Jm3NkfmUwTXc+fbf l2g= WDCIronportException: Internal From: Alistair Francis To: libc-alpha@sourceware.org Cc: arnd@arndb.de, adhemerval.zanella@linaro.org, fweimer@redhat.com, joseph@codesourcery.com, palmerdabbelt@google.com, macro@wdc.com, zongbox@gmail.com, alistair.francis@wdc.com, alistair23@gmail.com Subject: [RFC v6 14/23] RISC-V: The ABI implementation for the 32-bit Date: Sun, 12 Jan 2020 02:34:08 -0800 Message-Id: <3194d8fa0b88f8da6409fd01a9cf5a8fb2f32092.1578824547.git.alistair.francis@wdc.com> In-Reply-To: References: MIME-Version: 1.0 From: Zong Li This patch adds the ABI implementation about 32 bit version. It contains the Linux-specific and RISC-V architecture code, I've collected here. --- sysdeps/riscv/bits/wordsize.h | 4 +- sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 10 +++- sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 +++++++++- sysdeps/riscv/sfp-machine.h | 27 +++++++++- sysdeps/riscv/sys/asm.h | 5 +- .../unix/sysv/linux/riscv/jmp_buf-macros.h | 53 +++++++++++++++++++ 6 files changed, 121 insertions(+), 5 deletions(-) create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h index faccc71828..ee430d9036 100644 --- a/sysdeps/riscv/bits/wordsize.h +++ b/sysdeps/riscv/bits/wordsize.h @@ -25,5 +25,7 @@ #if __riscv_xlen == 64 # define __WORDSIZE_TIME64_COMPAT32 1 #else -# error "rv32i-based targets are not supported" +# define __WORDSIZE_TIME64_COMPAT32 0 +# define __WORDSIZE32_SIZE_ULONG 0 +# define __WORDSIZE32_PTRDIFF_LONG 0 #endif diff --git a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h index c3c72d6c10..363034c38a 100644 --- a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h +++ b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h @@ -32,7 +32,15 @@ # define __SIZEOF_PTHREAD_BARRIER_T 32 # define __SIZEOF_PTHREAD_BARRIERATTR_T 4 #else -# error "rv32i-based systems are not supported" +# define __SIZEOF_PTHREAD_ATTR_T 32 +# define __SIZEOF_PTHREAD_MUTEX_T 32 +# define __SIZEOF_PTHREAD_MUTEXATTR_T 4 +# define __SIZEOF_PTHREAD_COND_T 48 +# define __SIZEOF_PTHREAD_CONDATTR_T 4 +# define __SIZEOF_PTHREAD_RWLOCK_T 48 +# define __SIZEOF_PTHREAD_RWLOCKATTR_T 8 +# define __SIZEOF_PTHREAD_BARRIER_T 20 +# define __SIZEOF_PTHREAD_BARRIERATTR_T 4 #endif #define __LOCK_ALIGNMENT diff --git a/sysdeps/riscv/nptl/bits/struct_rwlock.h b/sysdeps/riscv/nptl/bits/struct_rwlock.h index acfaa75e1b..b478da0132 100644 --- a/sysdeps/riscv/nptl/bits/struct_rwlock.h +++ b/sysdeps/riscv/nptl/bits/struct_rwlock.h @@ -32,14 +32,39 @@ struct __pthread_rwlock_arch_t unsigned int __writers_futex; unsigned int __pad3; unsigned int __pad4; +#if __riscv_xlen == 64 int __cur_writer; int __shared; unsigned long int __pad1; unsigned long int __pad2; unsigned int __flags; +#else +# if __BYTE_ORDER == __BIG_ENDIAN + unsigned char __pad1; + unsigned char __pad2; + unsigned char __shared; + unsigned char __flags; +# else + unsigned char __flags; + unsigned char __shared; + unsigned char __pad1; + unsigned char __pad2; +# endif + int __cur_writer; +#endif }; -#define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ +#if __riscv_xlen == 64 +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags +#else +# if __BYTE_ORDER == __BIG_ENDIAN +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags, 0 +# else +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ + 0, 0, 0, 0, 0, 0, __flags, 0, 0, 0, 0 +# endif +#endif #endif diff --git a/sysdeps/riscv/sfp-machine.h b/sysdeps/riscv/sfp-machine.h index 08a84fd701..aef8c61a67 100644 --- a/sysdeps/riscv/sfp-machine.h +++ b/sysdeps/riscv/sfp-machine.h @@ -22,7 +22,32 @@ #if __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define _FP_W_TYPE_SIZE 32 +# define _FP_W_TYPE unsigned long +# define _FP_WS_TYPE signed long +# define _FP_I_TYPE long + +# define _FP_MUL_MEAT_S(R, X, Y) \ + _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_D(R, X, Y) \ + _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_Q(R, X, Y) \ + _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_MUL_MEAT_DW_S(R, X, Y) \ + _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_D(R, X, Y) \ + _FP_MUL_MEAT_DW_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_Q(R, X, Y) \ + _FP_MUL_MEAT_DW_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y) +# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y) +# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D, 0 +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 #else diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h index bd2de17e17..e314133ce4 100644 --- a/sysdeps/riscv/sys/asm.h +++ b/sysdeps/riscv/sys/asm.h @@ -26,7 +26,10 @@ # define REG_S sd # define REG_L ld #elif __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define PTRLOG 2 +# define SZREG 4 +# define REG_S sw +# define REG_L lw #else # error __riscv_xlen must equal 32 or 64 #endif diff --git a/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h b/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h new file mode 100644 index 0000000000..7e48f24345 --- /dev/null +++ b/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h @@ -0,0 +1,53 @@ +/* jump buffer constants for RISC-V + Copyright (C) 2017-2020 Free Software Foundation, Inc. + + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +/* Produced by this program: + + #include + #include + #include + #include + + int main (int argc, char **argv) + { + printf ("#define JMP_BUF_SIZE %d\n", sizeof (jmp_buf)); + printf ("#define JMP_BUF_ALIGN %d\n", __alignof__ (jmp_buf)); + printf ("#define SIGJMP_BUF_SIZE %d\n", sizeof (sigjmp_buf)); + printf ("#define SIGJMP_BUF_ALIGN %d\n", __alignof__ (sigjmp_buf)); + printf ("#define MASK_WAS_SAVED_OFFSET %d\n", offsetof (struct __jmp_buf_tag, __mask_was_saved)); + printf ("#define SAVED_MASK_OFFSET %d\n", offsetof (struct __jmp_buf_tag, __saved_mask)); + } */ + +#if defined __riscv_float_abi_soft +# define JMP_BUF_SIZE 188 +# define JMP_BUF_ALIGN 4 +# define SIGJMP_BUF_SIZE 188 +# define SIGJMP_BUF_ALIGN 4 +# define MASK_WAS_SAVED_OFFSET 56 +# define SAVED_MASK_OFFSET 60 +#elif defined __riscv_float_abi_double +# define JMP_BUF_SIZE 288 +# define JMP_BUF_ALIGN 8 +# define SIGJMP_BUF_SIZE 288 +# define SIGJMP_BUF_ALIGN 8 +# define MASK_WAS_SAVED_OFFSET 152 +# define SAVED_MASK_OFFSET 156 +#else +# error "Unknown RISC-V floating-point ABI" +#endif