diff mbox series

[6/8] LoongArch: Fix the la_pltexit path of _dl_runtime_profile

Message ID 20260928185535.1353957-7-adhemerval.zanella@linaro.org (mailing list archive)
State Under Review
Delegated to: Florian Weimer
Headers
Series elf: Fix auditing with multiple auditors and la_pltexit |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
linaro-tcwg-bot/tcwg_glibc_build--master-arm success Build passed
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 success Test passed
linaro-tcwg-bot/tcwg_glibc_check--master-arm success Test passed

Commit Message

Adhemerval Zanella Sept. 28, 2026, 6:55 p.m. UTC 
  The la_pltexit path stored the return values over the saved
_dl_audit_pltexit arguments instead of in La_loongarch_retval, so
_dl_audit_pltexit was called with the return value as its link map.
It then returned through the lr_ra field, which was never set, and
stored fp instead of restoring it.

Set lr_ra and lr_sp at entry, use La_loongarch_retval for the return
values, and restore fp.

The tst-audit-plt-flags XFAIL is removed.

Checked on loongarch64-linux-gnuf64.
---
 sysdeps/loongarch/Makefile        |  2 --
 sysdeps/loongarch/dl-trampoline.h | 35 ++++++++++++++++++-------------
 2 files changed, 20 insertions(+), 17 deletions(-)
diff mbox series

Patch

diff --git a/sysdeps/loongarch/Makefile b/sysdeps/loongarch/Makefile
index 304f246630b..5818755f053 100644
--- a/sysdeps/loongarch/Makefile
+++ b/sysdeps/loongarch/Makefile
@@ -22,8 +22,6 @@  gen-as-const-headers += \
 
 CFLAGS-tst-tunables-seal.c += -DTST_SEAL_TUNABLE_NAME=hwcaps
 tst-tunables-seal-TUNABLES += glibc.cpu.hwcaps=-LASX
-
-test-xfail-tst-audit-plt-flags = yes
 endif
 
 ifeq ($(subdir),csu)
diff --git a/sysdeps/loongarch/dl-trampoline.h b/sysdeps/loongarch/dl-trampoline.h
index 578ed8600ae..02818280b1e 100644
--- a/sysdeps/loongarch/dl-trampoline.h
+++ b/sysdeps/loongarch/dl-trampoline.h
@@ -164,6 +164,11 @@  ENTRY (_dl_runtime_profile)
 
 	or	fp, sp, zero
 
+	/* The la_pltexit path returns through lr_ra.  */
+	REG_S	ra, fp, OFFSET_RG + DL_OFFSET_RG_RA
+	ADDI	t2, fp, SF_SIZE
+	REG_S	t2, fp, OFFSET_RG + DL_OFFSET_RG_SP
+
 	REG_S	a0, fp, OFFSET_RG + DL_OFFSET_RG_A0 + 0*SZREG
 	REG_S	a1, fp, OFFSET_RG + DL_OFFSET_RG_A0 + 1*SZREG
 	REG_S	a2, fp, OFFSET_RG + DL_OFFSET_RG_A0 + 2*SZREG
@@ -323,18 +328,18 @@  ENTRY (_dl_runtime_profile)
 
 	jirl	ra, t6, 0
 
-	REG_S	a0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_A0
-	REG_S	a1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_A0 + SZREG
+	REG_S	a0, fp, OFFSET_RV + DL_OFFSET_RV_A0
+	REG_S	a1, fp, OFFSET_RV + DL_OFFSET_RV_A0 + SZREG
 
 #ifdef USE_LASX
-	xvst	xr0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	xvst	xr1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZXREG
+	xvst	xr0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	xvst	xr1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZXREG
 #elif defined USE_LSX
-	vst	vr0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	vst	vr1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZVREG
+	vst	vr0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	vst	vr1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZVREG
 #elif !defined __loongarch_soft_float
-	FREG_S	fa0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	FREG_S	fa1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZFREG
+	FREG_S	fa0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	FREG_S	fa1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZFREG
 #endif
 
 	/* Setup call to pltexit.  */
@@ -349,21 +354,21 @@  ENTRY (_dl_runtime_profile)
 	REG_L	a1, fp, OFFSET_RV + DL_OFFSET_RV_A0 + SZREG
 
 #ifdef USE_LASX
-	xvld	xr0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	xvld	xr1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZXREG
+	xvld	xr0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	xvld	xr1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZXREG
 #elif defined USE_LSX
-	vld	vr0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	vld	vr1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZVREG
+	vld	vr0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	vld	vr1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZVREG
 #elif !defined __loongarch_soft_float
-	FREG_L	fa0, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0
-	FREG_L	fa1, fp, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_VEC0 + SZFREG
+	FREG_L	fa0, fp, OFFSET_RV + DL_OFFSET_RV_VEC0
+	FREG_L	fa1, fp, OFFSET_RV + DL_OFFSET_RV_VEC0 + SZFREG
 #endif
 
 	/* RA from within La_loongarch_reg.  */
 	REG_L   ra, fp, OFFSET_RG + DL_OFFSET_RG_RA
 	or	sp, fp, zero
+	REG_L	fp, sp, SZREG
 	ADDI	sp, sp, SF_SIZE
-	REG_S   fp, fp, SZREG
 
 	jirl	zero, ra, 0