diff mbox series

[v5,06/16] riscv/cfi: Add prctl definitions for RISC-V CFI

Message ID 20260628070241.88310-7-jesse.huang@sifive.com (mailing list archive)
State New
Headers
Series Support RISC-V Control Flow Integrifty (CFI) |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent

Commit Message

Jesse Huang June 28, 2026, 7:02 a.m. UTC 
  These operations are for setting/retrieving/locking the status of the
landing pad and the shadow stack extensions.
---
 .../unix/sysv/linux/riscv/include/asm/prctl.h | 43 +++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 sysdeps/unix/sysv/linux/riscv/include/asm/prctl.h
diff mbox series

Patch

diff --git a/sysdeps/unix/sysv/linux/riscv/include/asm/prctl.h b/sysdeps/unix/sysv/linux/riscv/include/asm/prctl.h
new file mode 100644
index 0000000000..30a37452e1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/riscv/include/asm/prctl.h
@@ -0,0 +1,43 @@ 
+/*
+ * Get the current shadow stack configuration for the current thread,
+ * this will be the value configured via PR_SET_SHADOW_STACK_STATUS.
+ */
+#define PR_GET_SHADOW_STACK_STATUS	74
+
+/*
+ * Set the current shadow stack configuration.  Enabling the shadow
+ * stack will cause a shadow stack to be allocated for the thread.
+ */
+#define PR_SET_SHADOW_STACK_STATUS	75
+# define PR_SHADOW_STACK_ENABLE		(1UL << 0)
+# define PR_SHADOW_STACK_WRITE		(1UL << 1)
+# define PR_SHADOW_STACK_PUSH		(1UL << 2)
+
+/*
+ * Prevent further changes to the specified shadow stack
+ * configuration.  All bits may be locked via this call, including
+ * undefined bits.
+ */
+#define PR_LOCK_SHADOW_STACK_STATUS	76
+
+/*
+ * Get or set the control flow integrity (CFI) configuration for the
+ * current thread.
+ *
+ * Some per-thread control flow integrity settings are not yet
+ * controlled through this prctl(); see for example
+ * PR_{GET,SET,LOCK}_SHADOW_STACK_STATUS
+ */
+#define PR_GET_CFI	80
+#define PR_SET_CFI	81
+
+/*
+ * Forward-edge CFI variants (excluding ARM64 BTI, which has its own
+ * prctl()s).
+ */
+#define PR_CFI_BRANCH_LANDING_PADS	0
+
+/* Return and control values for PR_{GET,SET}_CFI */
+# define PR_CFI_ENABLE		(1UL << 0)
+# define PR_CFI_DISABLE		(1UL << 1)
+# define PR_CFI_LOCK		(1UL << 2)