diff mbox series

[v4,02/17] riscv/cfi: Setup necessary options for enable-cfi option

Message ID 20260526061703.2188042-3-jesse.huang@sifive.com (mailing list archive)
State New
Headers
Series Support RISC-V Control Flow Integrifty (CFI) |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
linaro-tcwg-bot/tcwg_glibc_build--master-arm success Build passed
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 success Test passed

Commit Message

Jesse Huang May 26, 2026, 6:16 a.m. UTC 
  Co-authored-by: Hau Hsu <hau.hsu@sifive.com>
---
 sysdeps/riscv/Makefile        | 9 +++++++++
 sysdeps/riscv/preconfigure    | 2 ++
 sysdeps/riscv/preconfigure.ac | 1 +
 3 files changed, 12 insertions(+)

Comments

Deepak Gupta May 26, 2026, 6:29 p.m. UTC | #1 
On Mon, May 25, 2026 at 11:17 PM Jesse Huang <jesse.huang@sifive.com> wrote:
>
> Co-authored-by: Hau Hsu <hau.hsu@sifive.com>
> ---

Reviewed-by: Deepak Gupta <debug@rivosinc.com>

>  sysdeps/riscv/Makefile        | 9 +++++++++
>  sysdeps/riscv/preconfigure    | 2 ++
>  sysdeps/riscv/preconfigure.ac | 1 +
>  3 files changed, 12 insertions(+)
>
> diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
> index c08753ae8a..99976fddad 100644
> --- a/sysdeps/riscv/Makefile
> +++ b/sysdeps/riscv/Makefile
> @@ -15,3 +15,12 @@ ASFLAGS-.os += -Wa,-mno-relax
>  ASFLAGS-.o += -Wa,-mno-relax
>  sysdep-CFLAGS += -mno-relax
>  endif
> +
> +# Enable RISC-V CFI
> +ifeq (yes,$(riscv-enable-cfi))
> +CFLAGS-.o += -fcf-protection=full
> +CFLAGS-.os += -fcf-protection=full
> +CFLAGS-.op += -fcf-protection=full
> +CFLAGS-.oS += -fcf-protection=full
> +asm-CPPFLAGS += -fcf-protection=full -include sysdep.h
> +endif
> diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure
> index 57fe6822cf..b480c53d5f 100755
> --- a/sysdeps/riscv/preconfigure
> +++ b/sysdeps/riscv/preconfigure
> @@ -79,6 +79,8 @@ riscv*)
>
>      printf "%s\n" "#define RISCV_ABI_FLEN $abi_flen" >>confdefs.h
>
> +    config_vars="$config_vars
> +riscv-enable-cfi = $enable_cfi"
>      ;;
>  esac
>
> diff --git a/sysdeps/riscv/preconfigure.ac b/sysdeps/riscv/preconfigure.ac
> index 52414919ae..15c61e9305 100644
> --- a/sysdeps/riscv/preconfigure.ac
> +++ b/sysdeps/riscv/preconfigure.ac
> @@ -77,5 +77,6 @@ riscv*)
>
>      AC_DEFINE_UNQUOTED([RISCV_ABI_XLEN], [$xlen])
>      AC_DEFINE_UNQUOTED([RISCV_ABI_FLEN], [$abi_flen])
> +    LIBC_CONFIG_VAR([riscv-enable-cfi], [$enable_cfi])
>      ;;
>  esac
> --
> 2.43.7
>
diff mbox series

Patch

diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
index c08753ae8a..99976fddad 100644
--- a/sysdeps/riscv/Makefile
+++ b/sysdeps/riscv/Makefile
@@ -15,3 +15,12 @@  ASFLAGS-.os += -Wa,-mno-relax
 ASFLAGS-.o += -Wa,-mno-relax
 sysdep-CFLAGS += -mno-relax
 endif
+
+# Enable RISC-V CFI
+ifeq (yes,$(riscv-enable-cfi))
+CFLAGS-.o += -fcf-protection=full
+CFLAGS-.os += -fcf-protection=full
+CFLAGS-.op += -fcf-protection=full
+CFLAGS-.oS += -fcf-protection=full
+asm-CPPFLAGS += -fcf-protection=full -include sysdep.h
+endif
diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure
index 57fe6822cf..b480c53d5f 100755
--- a/sysdeps/riscv/preconfigure
+++ b/sysdeps/riscv/preconfigure
@@ -79,6 +79,8 @@  riscv*)
 
     printf "%s\n" "#define RISCV_ABI_FLEN $abi_flen" >>confdefs.h
 
+    config_vars="$config_vars
+riscv-enable-cfi = $enable_cfi"
     ;;
 esac
 
diff --git a/sysdeps/riscv/preconfigure.ac b/sysdeps/riscv/preconfigure.ac
index 52414919ae..15c61e9305 100644
--- a/sysdeps/riscv/preconfigure.ac
+++ b/sysdeps/riscv/preconfigure.ac
@@ -77,5 +77,6 @@  riscv*)
 
     AC_DEFINE_UNQUOTED([RISCV_ABI_XLEN], [$xlen])
     AC_DEFINE_UNQUOTED([RISCV_ABI_FLEN], [$abi_flen])
+    LIBC_CONFIG_VAR([riscv-enable-cfi], [$enable_cfi])
     ;;
 esac