[v2,3/3] RISC-V: Use builtins for ffs and ffsll while supported extension available
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Commit Message
Hardware ctz/ctzw instructions are available in the RISC-V Zbb extension, and the similar ctz instruction th.ff1 is available in the RISC-V XTheadBb extension. We can get more simplified code compared to the generic implement of ffs/ffsll.
Signed-off-by: Julian Zhu <jz531210@gmail.com>
---
sysdeps/riscv/math-use-builtins-ffs.h | 10 ++++++++++
1 file changed, 10 insertions(+)
create mode 100644 sysdeps/riscv/math-use-builtins-ffs.h
new file mode 100644
@@ -0,0 +1,10 @@
+#if defined COMPILER_ZBB_AVAIL && defined __riscv_zbb
+# define USE_FFS_BUILTIN 1
+# define USE_FFSLL_BUILTIN 1
+#elif defined COMPILER_XTHEADBB_AVAIL && defined __riscv_xtheadbb
+# define USE_FFS_BUILTIN 0
+# define USE_FFSLL_BUILTIN 1
+#else
+# define USE_FFS_BUILTIN 0
+# define USE_FFSLL_BUILTIN 0
+#endif