[v2,3/3] RISC-V: Use builtins for ffs and ffsll while supported extension available

Message ID 20240707145831.9114-3-jz531210@gmail.com
State New
Series [v2,1/3] RISC-V: Add a macro definition file to check whether the compiler supports extensions. |


Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
redhat-pt-bot/TryBot-32bit success Build for i686
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 success Test passed
linaro-tcwg-bot/tcwg_glibc_build--master-arm success Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-arm success Test passed

Commit Message

Julian Zhu July 7, 2024, 2:58 p.m. UTC
  Hardware ctz/ctzw instructions are available in the RISC-V Zbb extension, and the similar ctz instruction th.ff1 is available in the RISC-V XTheadBb extension. We can get more simplified code compared to the generic implement of ffs/ffsll.

Signed-off-by: Julian Zhu <jz531210@gmail.com>
 sysdeps/riscv/math-use-builtins-ffs.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 sysdeps/riscv/math-use-builtins-ffs.h


diff --git a/sysdeps/riscv/math-use-builtins-ffs.h b/sysdeps/riscv/math-use-builtins-ffs.h
new file mode 100644
index 0000000000..8104e29f84
--- /dev/null
+++ b/sysdeps/riscv/math-use-builtins-ffs.h
@@ -0,0 +1,10 @@ 
+#if defined COMPILER_ZBB_AVAIL && defined __riscv_zbb
+#  define USE_FFS_BUILTIN 1
+#  define USE_FFSLL_BUILTIN 1
+#elif defined COMPILER_XTHEADBB_AVAIL && defined __riscv_xtheadbb
+#  define USE_FFS_BUILTIN 0
+#  define USE_FFSLL_BUILTIN 1
+#  define USE_FFS_BUILTIN 0
+#  define USE_FFSLL_BUILTIN 0