[v1] LoongArch: Fix _dl_tlsdesc_dynamic in LSX case

Message ID 20240614035830.3080997-1-mengqinggang@loongson.cn
State Committed
Commit 9a675d998ea1b37d5fc40611b015cc5c595d375c
Headers
Series [v1] LoongArch: Fix _dl_tlsdesc_dynamic in LSX case |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
redhat-pt-bot/TryBot-32bit success Build for i686
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Commit Message

mengqinggang June 14, 2024, 3:58 a.m. UTC
  HWCAP value is overwritten at the first comparison of the LASX case.
The second comparison at LSX get incorrect result.
Change to use t0 to save HWCAP value, and use t1 to save comparison
result.
---
 sysdeps/loongarch/dl-tlsdesc.S | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)
  

Patch

diff --git a/sysdeps/loongarch/dl-tlsdesc.S b/sysdeps/loongarch/dl-tlsdesc.S
index 15d5fa1c42..617529b47a 100644
--- a/sysdeps/loongarch/dl-tlsdesc.S
+++ b/sysdeps/loongarch/dl-tlsdesc.S
@@ -81,7 +81,7 @@  _dl_tlsdesc_undefweak:
 	   _dl_tlsdesc_dynamic (struct tlsdesc *tdp)
 	   {
 	     struct tlsdesc_dynamic_arg *td = tdp->arg;
-	     dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - TCBHEAD_DTV);
+	     dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - SIZE_OF_TCB);
 	     if (__glibc_likely (td->gen_count <= dtv[0].counter
 		&& (dtv[td->tlsinfo.ti_module].pointer.val
 		    != TLS_DTV_UNALLOCATED),
@@ -178,8 +178,8 @@  Hign address	dynamic_block1 <----- dtv5  */
 	/* Whether support LASX.  */
 	la.global   t0, _rtld_global_ro
 	REG_L	t0, t0, GLRO_DL_HWCAP_OFFSET
-	andi	t0, t0, HWCAP_LOONGARCH_LASX
-	beqz	t0, .Llsx
+	andi	t1, t0, HWCAP_LOONGARCH_LASX
+	beqz	t1, .Llsx
 
 	/* Save 256-bit vector registers.
 	   FIXME: Without vector ABI, save all vector registers.  */
@@ -220,8 +220,8 @@  Hign address	dynamic_block1 <----- dtv5  */
 
 .Llsx:
 	/* Whether support LSX.  */
-	andi	t0, t0, HWCAP_LOONGARCH_LSX
-	beqz	t0, .Lfloat
+	andi	t1, t0, HWCAP_LOONGARCH_LSX
+	beqz	t1, .Lfloat
 
 	/* Save 128-bit vector registers.  */
 	ADDI	sp, sp, -FRAME_SIZE_LSX
@@ -297,8 +297,8 @@  Hign address	dynamic_block1 <----- dtv5  */
 
 	la.global   t0, _rtld_global_ro
 	REG_L	t0, t0, GLRO_DL_HWCAP_OFFSET
-	andi	t0, t0, HWCAP_LOONGARCH_LASX
-	beqz	t0, .Llsx1
+	andi	t1, t0, HWCAP_LOONGARCH_LASX
+	beqz	t1, .Llsx1
 
 	/* Restore 256-bit vector registers.  */
 	xvld	xr0, sp, 0*SZXREG
@@ -337,8 +337,8 @@  Hign address	dynamic_block1 <----- dtv5  */
 	b .Lfcsr
 
 .Llsx1:
-	andi	t0, s0, HWCAP_LOONGARCH_LSX
-	beqz	t0, .Lfloat1
+	andi	t1, t0, HWCAP_LOONGARCH_LSX
+	beqz	t1, .Lfloat1
 
 	/* Restore 128-bit vector registers.  */
 	vld	vr0, sp, 0*SZVREG