[v3] powerpc: Fix __fesetround_inline_nocheck on POWER9+ (BZ 31682)
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Commit Message
The e68b1151f7460d5fa88c3a567c13f66052da79a7 commit changed the
__fesetround_inline_nocheck implementation to use mffscrni
(through __fe_mffscrn) instead of mtfsfi. For generic powerpc
ceil/floor/trunc, the function is supposed to disable the
floating-point inexact exception enablebbit, however mffscrni
does not change any exception enable bits.
This patch fixes by reverting the optimization for the
__fesetround_inline_nocheck.
Checked on powerpc-linux-gnu.
---
sysdeps/powerpc/fpu/fenv_libc.h | 16 +++++-----------
sysdeps/powerpc/fpu/round_to_integer.h | 6 +++---
2 files changed, 8 insertions(+), 14 deletions(-)
Comments
On Mai 07 2024, Adhemerval Zanella wrote:
> floating-point inexact exception enablebbit, however mffscrni
enable bit
On 07/05/24 09:48, Andreas Schwab wrote:
> On Mai 07 2024, Adhemerval Zanella wrote:
>
>> floating-point inexact exception enablebbit, however mffscrni
> enable bit
>
Ack, I fixed it locally.
On 5/7/24 7:19 AM, Adhemerval Zanella wrote:
> The e68b1151f7460d5fa88c3a567c13f66052da79a7 commit changed the
> __fesetround_inline_nocheck implementation to use mffscrni
> (through __fe_mffscrn) instead of mtfsfi. For generic powerpc
> ceil/floor/trunc, the function is supposed to disable the
> floating-point inexact exception enablebbit, however mffscrni
> does not change any exception enable bits.
>
> This patch fixes by reverting the optimization for the
> __fesetround_inline_nocheck.
Thanks. LGTM with trivial typo fixes noted by Andreas.
Reviewed-by: Paul E. Murphy <murphyp@linux.ibm.com>
@@ -182,19 +182,13 @@ __fesetround_inline (int round)
return 0;
}
-/* Same as __fesetround_inline, however without runtime check to use DFP
- mtfsfi syntax (as relax_fenv_state) or if round value is valid. */
+/* Same as __fesetround_inline, and it also disable the floating-point
+ inexact execption (bit 60 - XE, assuming NI is 0). It does not check
+ if ROUND is a valid value. */
static inline void
-__fesetround_inline_nocheck (const int round)
+__fesetround_inline_disable_inexact (const int round)
{
-#ifdef _ARCH_PWR9
- __fe_mffscrn (round);
-#else
- if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
- __fe_mffscrn (round);
- else
- asm volatile ("mtfsfi 7,%0" : : "n" (round));
-#endif
+ asm volatile ("mtfsfi 7,%0" : : "n" (round));
}
#define FPSCR_MASK(bit) (1 << (31 - (bit)))
@@ -42,14 +42,14 @@ set_fenv_mode (enum round_mode mode)
switch (mode)
{
case CEIL:
- __fesetround_inline_nocheck (FE_UPWARD);
+ __fesetround_inline_disable_inexact (FE_UPWARD);
break;
case FLOOR:
- __fesetround_inline_nocheck (FE_DOWNWARD);
+ __fesetround_inline_disable_inexact (FE_DOWNWARD);
break;
case TRUNC:
case ROUND:
- __fesetround_inline_nocheck (FE_TOWARDZERO);
+ __fesetround_inline_disable_inexact (FE_TOWARDZERO);
break;
case NEARBYINT:
/* Disable FE_INEXACT exception */