From patchwork Wed Apr 3 12:11:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 87978 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 14DCA3844031 for ; Wed, 3 Apr 2024 12:14:19 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by sourceware.org (Postfix) with ESMTPS id 816CB384640C for ; Wed, 3 Apr 2024 12:12:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 816CB384640C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 816CB384640C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::436 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712146326; cv=none; b=tlMKHhXCPs5SbNgUVqfhhmkBQzcqaBfFQjIqvcUetm2Ojxw1EysxOkANihDjd03PJ4BP+GLTAvUuJA/tPZP8NhVm5IOW/7DW383hcEHGz2BCx8MlnrU2nOx9dzy1uJJCPEaAt4NLzk4p6QXF5sK0tJsTu/1h9ROwB9Ac1osgVjs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712146326; c=relaxed/simple; bh=8g4fxH9M44OtNYweb9m1+FmXQvqgcDl99n8cxd2Yis0=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=mU2gI5TpH1eviWDIzNYHgFjcqkn+xrG6VIjgpKwYxpxy087i3DiJnIxNkx1RN3tC60fl3Lv0Xqqw+v2QW0rPCZXzEXCev3VlPkUzB5JToOnSGvEsykiaITYALi8ciHtHPepj2bHiYGnAGI35xILmDKc/ogLWy0Qb+TV/WqJPxVA= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-6eafbcc5392so3258546b3a.1 for ; Wed, 03 Apr 2024 05:12:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1712146323; x=1712751123; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7TDdXvuo3sJbS/DX1+OISYI1rMNjhEeyXZ/PEXFfH4o=; b=fX8U7jOCKl74dkBS99GM4bgWCPeA+izzYqwdRTuft9I4ZPYMxyXnKooYWOEdiXmM1h upJk0Z23gXyhG5biD4RWqyobFvI19nltV0vmU7dzB1RUlQBsS4LCj714RqQJtpkIs+5U ERydJ5a1H3pp9f+A7BxoKCvSvu6VEBopsYlqsHYk72SLYGiiwtW/HXQATmJJSzWiMucL UyEA4lMwa7Df54u2wHFPeAxVaE2QUog9GrHIuLHSelBy9nAhfOH+Q27sSdbkp1SYTw2P iqxumjRM7lgwMz782fmMyQPidlYqSLTr2oZHI81NTBuaEOnGjG7aZ9j/sBLNEF5o/s/B 5uXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712146323; x=1712751123; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7TDdXvuo3sJbS/DX1+OISYI1rMNjhEeyXZ/PEXFfH4o=; b=XRStajErKuHjGhL7grVkclr2Aoypg9CwJdQojTY4S5ZfG05a9OluZp28SGsJjU1ZGf xLzjwteq7n2mCV3weuI0grETbmnHixy7ivZp70dNk6gqRfzJB5VOui2SgZzjAxVfjjzB LjJu+frVvY9pvM184E9nxYZZ0CI8EUorNHqDrFbjlLlV4Twk6/59LejTuh/ysWdQi0h1 F22M4l6uSiWiRaMggh1PN5jLufzPP+n4KwQapVpJN9NIqYDiKYLbRw8PSvJPYslTm9q9 5aacXT4nzOK4b8Bg7cVCDSCveJGWS6DmzAd23WTOdZr/3WbpvZY3dFzWPMetXsipiYuV 4VaA== X-Gm-Message-State: AOJu0Yw0MeokQNEVXdd4Srt9uHJWjH853dpruJ1v8ASt/Zdrj0G0NK2E bykuPqxszjopTo2DpUiEJZo6FlravMK5BW8vgiUUX488nMoMdMNVJNopsGduRc/1lvV6Rq57nwp y X-Google-Smtp-Source: AGHT+IFCkmDpf+hJvubvZjZIxdSMBKeRmSv9T84A8AKDOzrfJopmvhGN9w3M78vXtWNwQFvzsfJBzw== X-Received: by 2002:a05:6a21:1a2:b0:1a5:6f0f:cbe0 with SMTP id le34-20020a056a2101a200b001a56f0fcbe0mr2801032pzb.48.1712146322960; Wed, 03 Apr 2024 05:12:02 -0700 (PDT) Received: from mandiga.. ([2804:1b3:a7c3:b18e:12db:8f9c:da5:36ce]) by smtp.gmail.com with ESMTPSA id q6-20020a17090a938600b0029ffcf1df72sm13574141pjo.38.2024.04.03.05.12.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 05:12:02 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Cc: "H . J . Lu" Subject: [PATCH v2 05/10] x86: Do not raise inexact exception on ceill Date: Wed, 3 Apr 2024 09:11:45 -0300 Message-Id: <20240403121150.1018799-6-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240403121150.1018799-1-adhemerval.zanella@linaro.org> References: <20240403121150.1018799-1-adhemerval.zanella@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org It is not allowed anymore on ISO C23. Checked on x86_64-linux-gnu and i686-linux-gnu. --- sysdeps/i386/fpu/s_ceill.S | 39 ------------------------------------ sysdeps/x86/fpu/s_ceill.c | 38 +++++++++++++++++++++++++++++++++++ sysdeps/x86_64/fpu/s_ceill.S | 34 ------------------------------- 3 files changed, 38 insertions(+), 73 deletions(-) delete mode 100644 sysdeps/i386/fpu/s_ceill.S create mode 100644 sysdeps/x86/fpu/s_ceill.c delete mode 100644 sysdeps/x86_64/fpu/s_ceill.S diff --git a/sysdeps/i386/fpu/s_ceill.S b/sysdeps/i386/fpu/s_ceill.S deleted file mode 100644 index a551fce7f9..0000000000 --- a/sysdeps/i386/fpu/s_ceill.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Public domain. - */ - -#include -#include - -RCSID("$NetBSD: $") - -ENTRY(__ceill) - fldt 4(%esp) - subl $32,%esp - cfi_adjust_cfa_offset (32) - - fnstenv 4(%esp) /* store fpu environment */ - - /* We use here %edx although only the low 1 bits are defined. - But none of the operations should care and they are faster - than the 16 bit operations. */ - movl $0x0800,%edx /* round towards +oo */ - orl 4(%esp),%edx - andl $0xfbff,%edx - movl %edx,(%esp) - fldcw (%esp) /* load modified control word */ - - frndint /* round */ - - /* Preserve "invalid" exceptions from sNaN input. */ - fnstsw - andl $0x1, %eax - orl %eax, 8(%esp) - - fldenv 4(%esp) /* restore original environment */ - - addl $32,%esp - cfi_adjust_cfa_offset (-32) - ret -END (__ceill) -libm_alias_ldouble (__ceil, ceil) diff --git a/sysdeps/x86/fpu/s_ceill.c b/sysdeps/x86/fpu/s_ceill.c new file mode 100644 index 0000000000..6ccc9d84d4 --- /dev/null +++ b/sysdeps/x86/fpu/s_ceill.c @@ -0,0 +1,38 @@ +/* Return smallest integral value not less than argument. x86 version. + Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define NO_MATH_REDIRECT +#include +#include +#include + +long double +__ceill (long double x) +{ + fenv_t fenv; + long double r; + + libc_feholdexcept_setround_387 (&fenv, FE_UPWARD); + asm volatile ("frndint" : "=t" (r) : "0" (x)); + /* Preserve "invalid" exceptions from sNaN input. */ + fenv.__status_word |= libc_fetestexcept_387 (FE_INVALID); + libc_fesetenv_387 (&fenv); + + return r; +} +libm_alias_ldouble (__ceil, ceil) diff --git a/sysdeps/x86_64/fpu/s_ceill.S b/sysdeps/x86_64/fpu/s_ceill.S deleted file mode 100644 index 16dbecd56d..0000000000 --- a/sysdeps/x86_64/fpu/s_ceill.S +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Public domain. - */ - -#include -#include - - -ENTRY(__ceill) - fldt 8(%rsp) - - fnstenv -28(%rsp) /* store fpu environment */ - - /* We use here %edx although only the low 1 bits are defined. - But none of the operations should care and they are faster - than the 16 bit operations. */ - movl $0x0800,%edx /* round towards +oo */ - orl -28(%rsp),%edx - andl $0xfbff,%edx - movl %edx,-32(%rsp) - fldcw -32(%rsp) /* load modified control word */ - - frndint /* round */ - - /* Preserve "invalid" exceptions from sNaN input. */ - fnstsw - andl $0x1, %eax - orl %eax, -24(%rsp) - - fldenv -28(%rsp) /* restore original environment */ - - ret -END (__ceill) -libm_alias_ldouble (__ceil, ceil)