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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id a20-20020a1709063e9400b00a0369e232bfsm5753427ejj.75.2023.11.27.06.56.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 06:56:10 -0800 (PST) From: Christoph Muellner To: libc-alpha@sourceware.org, Palmer Dabbelt , Darius Rad , Andrew Waterman , Philipp Tomsich Cc: =?utf-8?q?Christoph_M=C3=BCllner?= Subject: [RFC PATCH 2/2] RISC-V: Attempt to enable TSO mode for TSO binaries Date: Mon, 27 Nov 2023 15:56:03 +0100 Message-ID: <20231127145603.2339644-3-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231127145603.2339644-1-christoph.muellner@vrull.eu> References: <20231127145603.2339644-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org From: Christoph Müllner The upcoming RISC-V Ssdtso specification introduces a bit in the senvcfg CSR to switch the memory consistency model at run-time from RVWMO to TSO (and back). The active consistency model can therefore be switched on a per-hart base and managed by the kernel on a per-process/thread base. A RFC kernel patchset has been posted that provides a prctl API to get and set the current consistency model. This patch attempts to switch to the TSO consistency model in case the ELF file requires a TSO machine and the machine does not run in TSO mode. If the attempt fails, we fall back to the old behaviour and claim that the ELF file is not compatible with the host. Signed-off-by: Christoph Müllner --- sysdeps/riscv/dl-machine.h | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h index ce537731dd..65be660a76 100644 --- a/sysdeps/riscv/dl-machine.h +++ b/sysdeps/riscv/dl-machine.h @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -72,9 +73,19 @@ elf_machine_matches_host (const ElfW(Ehdr) *ehdr) return 0; #endif - /* Execution of TSO binaries is not supported at this time. */ + /* Execution of TSO binaries depends on machine's consistency model. */ if (ehdr->e_flags & EF_RISCV_TSO) - return 0; + { + /* Attempt to get current consistency model. */ + int ret = prctl(PR_GET_MEMORY_CONSISTENCY_MODEL); + if (ret == -1) + return 0; + /* If we have a mismatch, let's try to switch to TSO. */ + if (ret != PR_MEMORY_CONSISTENCY_MODEL_RISCV_TSO && + prctl(PR_SET_MEMORY_CONSISTENCY_MODEL, + PR_MEMORY_CONSISTENCY_MODEL_RISCV_TSO)) + return 0; + } return 1; }