diff mbox series

[v2,4/7] manual: Clarify undefined behavior of feenableexcept (BZ 31019)

Message ID 20231106132713.953501-5-adhemerval.zanella@linaro.org
State Committed
Commit e55599e0286655dd5f1f5b48005a17be37cc7f2c
Headers
Series Multiple floating-point environment fixes |

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Commit Message

Adhemerval Zanella Netto Nov. 6, 2023, 1:27 p.m. UTC 
  From: Bruno Haible <bruno@clisp.org>

Explain undefined behavior of feenableexcept in a special case.
---
 manual/arith.texi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Carlos O'Donell Nov. 6, 2023, 4:17 p.m. UTC | #1 
On 11/6/23 08:27, Adhemerval Zanella wrote:
> From: Bruno Haible <bruno@clisp.org>
> 
> Explain undefined behavior of feenableexcept in a special case.

LGTM.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>

> ---
>  manual/arith.texi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/manual/arith.texi b/manual/arith.texi
> index fa7110e992..be24c20493 100644
> --- a/manual/arith.texi
> +++ b/manual/arith.texi
> @@ -1176,6 +1176,12 @@ enabled, the status of the other exceptions is not changed.
>  
>  The function returns the previous enabled exceptions in case the
>  operation was successful, @code{-1} otherwise.
> +
> +Note: Enabling traps for an exception for which the exception flag is
> +currently already set (@pxref{Status bit operations}) has unspecified
> +consequences: it may or may not trigger a trap immediately.

Agreed.

> +@c It triggers a trap immediately on powerpc*, at the next floating-
> +@c instruction on i386, and not at all on the other CPUs.
>  @end deftypefun
>  
>  @deftypefun int fedisableexcept (int @var{excepts})
diff mbox series

Patch

diff --git a/manual/arith.texi b/manual/arith.texi
index fa7110e992..be24c20493 100644
--- a/manual/arith.texi
+++ b/manual/arith.texi
@@ -1176,6 +1176,12 @@  enabled, the status of the other exceptions is not changed.
 
 The function returns the previous enabled exceptions in case the
 operation was successful, @code{-1} otherwise.
+
+Note: Enabling traps for an exception for which the exception flag is
+currently already set (@pxref{Status bit operations}) has unspecified
+consequences: it may or may not trigger a trap immediately.
+@c It triggers a trap immediately on powerpc*, at the next floating-
+@c instruction on i386, and not at all on the other CPUs.
 @end deftypefun
 
 @deftypefun int fedisableexcept (int @var{excepts})