[3/4] x86: Do not prefer ERMS for memset on Zen3+
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redhat-pt-bot/TryBot-apply_patch |
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linaro-tcwg-bot/tcwg_glibc_check--master-arm |
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linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 |
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linaro-tcwg-bot/tcwg_glibc_build--master-arm |
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Commit Message
The REP STOSB usage on memset does show any performance gain on
Zen3/Zen4 cores compared to the vectorized loops.
Checked on x86_64-linux-gnu.
---
sysdeps/x86/dl-cacheinfo.h | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
@@ -1018,11 +1018,17 @@ dl_init_cacheinfo (struct cpu_features *cpu_features)
if (tunable_size > minimum_rep_movsb_threshold)
rep_movsb_threshold = tunable_size;
- /* NB: The default value of the x86_rep_stosb_threshold tunable is the
- same as the default value of __x86_rep_stosb_threshold and the
- minimum value is fixed. */
- rep_stosb_threshold = TUNABLE_GET (x86_rep_stosb_threshold,
- long int, NULL);
+ /* For AMD Zen3+ architecture, the performance of vectorized loop is
+ slight better than ERMS. */
+ if (cpu_features->basic.kind == arch_kind_amd)
+ rep_stosb_threshold = SIZE_MAX;
+
+ if (TUNABLE_IS_INITIALIZED (x86_rep_stosb_threshold))
+ /* NB: The default value of the x86_rep_stosb_threshold tunable is the
+ same as the default value of __x86_rep_stosb_threshold and the
+ minimum value is fixed. */
+ rep_stosb_threshold = TUNABLE_GET (x86_rep_stosb_threshold,
+ long int, NULL);
TUNABLE_SET_WITH_BOUNDS (x86_data_cache_size, data, 0, SIZE_MAX);
TUNABLE_SET_WITH_BOUNDS (x86_shared_cache_size, shared, 0, SIZE_MAX);