diff mbox series

[v4,2/3] RISC-V: Add TLSDESC reloc definitions.

Message ID 20230914084033.222120-3-ishitatsuyuki@gmail.com
State New
Headers
Series RISC-V: Implement TLS Descriptors. |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_glibc_check--master-arm success Testing passed
linaro-tcwg-bot/tcwg_glibc_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 success Testing passed

Commit Message

Tatsuyuki Ishi Sept. 14, 2023, 8:40 a.m. UTC 
  ---
 elf/elf.h | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Fangrui Song Jan. 27, 2024, 1:12 a.m. UTC | #1 
On Thu, Sep 14, 2023 at 1:42 AM Tatsuyuki Ishi <ishitatsuyuki@gmail.com> wrote:
>
> ---
>  elf/elf.h | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/elf/elf.h b/elf/elf.h
> index 9c51073f75..c6247c1bae 100644
> --- a/elf/elf.h
> +++ b/elf/elf.h
> @@ -3959,6 +3959,7 @@ enum
>  #define R_RISCV_TLS_DTPREL64    9
>  #define R_RISCV_TLS_TPREL32    10
>  #define R_RISCV_TLS_TPREL64    11
> +#define R_RISCV_TLSDESC                12
>  #define R_RISCV_BRANCH         16
>  #define R_RISCV_JAL            17
>  #define R_RISCV_CALL           18
> @@ -4005,6 +4006,10 @@ enum
>  #define R_RISCV_PLT32          59
>  #define R_RISCV_SET_ULEB128    60
>  #define R_RISCV_SUB_ULEB128    61
> +#define R_RISCV_TLSDESC_HI20   62
> +#define R_RISCV_TLSDESC_LOAD_LO12      63
> +#define R_RISCV_TLSDESC_ADD_LO12       64
> +#define R_RISCV_TLSDESC_CALL   65
>
>  #define R_RISCV_NUM            62

R_RISCV_NUM should be updated.
Otherwise, this looks good. I think this patch can land before the
rtld implementation is done.

> --
> 2.42.0
>
diff mbox series

Patch

diff --git a/elf/elf.h b/elf/elf.h
index 9c51073f75..c6247c1bae 100644
--- a/elf/elf.h
+++ b/elf/elf.h
@@ -3959,6 +3959,7 @@  enum
 #define R_RISCV_TLS_DTPREL64	 9
 #define R_RISCV_TLS_TPREL32	10
 #define R_RISCV_TLS_TPREL64	11
+#define R_RISCV_TLSDESC		12
 #define R_RISCV_BRANCH		16
 #define R_RISCV_JAL		17
 #define R_RISCV_CALL		18
@@ -4005,6 +4006,10 @@  enum
 #define R_RISCV_PLT32		59
 #define R_RISCV_SET_ULEB128	60
 #define R_RISCV_SUB_ULEB128	61
+#define R_RISCV_TLSDESC_HI20	62
+#define R_RISCV_TLSDESC_LOAD_LO12	63
+#define R_RISCV_TLSDESC_ADD_LO12	64
+#define R_RISCV_TLSDESC_CALL	65
 
 #define R_RISCV_NUM		62