From patchwork Sun Mar 19 15:09:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Bugaev X-Patchwork-Id: 66599 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 87E10383F438 for ; Sun, 19 Mar 2023 15:14:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 87E10383F438 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1679238874; bh=M7yyXvmKKtqMNJKTCPOz+2UumueFQ96aAjss7cnmxjQ=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=xQ+Dr30oOsl0l6Gy0nFAw5w5f3PV3yv4XsyM4RtzzrV5363kIrkbFPwuBbII6R4PJ vNQKtVKaJ1TFpq51JTNRzOMzoA+zVCM1U9c80fOKCxOuq1A/GluCssYA17gGiF321T n1GlP2WB/aP8fuK3U4oLlytWol14UKn+78jMA1c4= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by sourceware.org (Postfix) with ESMTPS id 059923857BA4 for ; Sun, 19 Mar 2023 15:11:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 059923857BA4 Received: by mail-lf1-x12b.google.com with SMTP id bi9so11992096lfb.12 for ; Sun, 19 Mar 2023 08:11:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679238671; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M7yyXvmKKtqMNJKTCPOz+2UumueFQ96aAjss7cnmxjQ=; b=v7vLFt6fzw55jxq17CztjfuKXGBcjdcSqFinFO7AjODstAkP/bqtLjPcv7oDi/aZ24 mnP+BFW9U5+xX4aONTTyGdkb4ZS4zTZ+PJKE58qM01lFxfzABgV7t53KxGERuC6vumer 67BARQHRW0MnoyYQjRwPXC5IvTLRTRTry679yPlMjMZkIB+D94p5MeTQD+LCh522l4M5 fqo3J+6aDGP/bo6MEsywXVWvK15FkCSFuKDK4EEoo6WXfiUBd2PhlhoQDM3K6wVyo/xA 15JLGQfJwhjmRrAiKTl8DlZYq19tT5RnooAEnkmUERwqd9gi6V1NkAAfc4XHz1tDIwRX b5Uw== X-Gm-Message-State: AO0yUKW8giRX52NLJGGEOO4Tn8hfvIImLX000h3qARe09/52JRlgL0oz Phz45dDJPkzw11OcGzV1KwPnBbjzASdxfw== X-Google-Smtp-Source: AK7set+0XXCOwJX+pP0Acy7flVkkm9xu23JLHj+mQLkk26mtSnXOe8C96+VMm8nn/09cTDlh062GxQ== X-Received: by 2002:a05:6512:38aa:b0:4bb:8d56:d859 with SMTP id o10-20020a05651238aa00b004bb8d56d859mr5210563lft.6.1679238671210; Sun, 19 Mar 2023 08:11:11 -0700 (PDT) Received: from surface-pro-6.. ([2a00:1370:818c:4a57:577a:76f4:df43:5e66]) by smtp.gmail.com with ESMTPSA id m19-20020ac24253000000b004e90dee5469sm1274089lfl.157.2023.03.19.08.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Mar 2023 08:11:10 -0700 (PDT) To: libc-alpha@sourceware.org, bug-hurd@gnu.org Cc: Samuel Thibault , Sergey Bugaev Subject: [RFC PATCH glibc 16/34] hurd: Add sys/ucontext.h and sigcontext.h for x86_64 Date: Sun, 19 Mar 2023 18:09:59 +0300 Message-Id: <20230319151017.531737-17-bugaevc@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230319151017.531737-1-bugaevc@gmail.com> References: <20230319151017.531737-1-bugaevc@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sergey Bugaev via Libc-alpha From: Sergey Bugaev Reply-To: Sergey Bugaev Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This is based on the Linux port's version, but laid out to match Mach's struct i386_thread_state, much like the i386 version does. Signed-off-by: Sergey Bugaev --- I'm not very sure about the FP stuff, nor about any of this, really. Please do review. sysdeps/mach/hurd/x86_64/bits/sigcontext.h | 131 +++++++++++++++++ sysdeps/mach/hurd/x86_64/sys/ucontext.h | 157 +++++++++++++++++++++ sysdeps/mach/hurd/x86_64/ucontext_i.sym | 38 +++++ 3 files changed, 326 insertions(+) create mode 100644 sysdeps/mach/hurd/x86_64/bits/sigcontext.h create mode 100644 sysdeps/mach/hurd/x86_64/sys/ucontext.h create mode 100644 sysdeps/mach/hurd/x86_64/ucontext_i.sym diff --git a/sysdeps/mach/hurd/x86_64/bits/sigcontext.h b/sysdeps/mach/hurd/x86_64/bits/sigcontext.h new file mode 100644 index 00000000..3a3b34bc --- /dev/null +++ b/sysdeps/mach/hurd/x86_64/bits/sigcontext.h @@ -0,0 +1,131 @@ +/* Machine-dependent signal context structure for GNU Hurd. x86_64 version. + Copyright (C) 1991-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _BITS_SIGCONTEXT_H +#define _BITS_SIGCONTEXT_H 1 + +#if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H +# error "Never use directly; include instead." +#endif + +/* Signal handlers are actually called: + void handler (int sig, int code, struct sigcontext *scp); */ + +#include +#include + +/* State of this thread when the signal was taken. */ +struct sigcontext + { + /* These first members are machine-independent. */ + + int sc_onstack; /* Nonzero if running on sigstack. */ + __sigset_t sc_mask; /* Blocked signals to restore. */ + + /* MiG reply port this thread is using. */ + unsigned int sc_reply_port; + + /* Port this thread is doing an interruptible RPC on. */ + unsigned int sc_intr_port; + + /* Error code associated with this signal (interpreted as `error_t'). */ + int sc_error; + + /* All following members are machine-dependent. The rest of this + structure is written to be laid out identically to: + { + struct i386_thread_state basic; + struct i386_float_state fpu; + } + trampoline.c knows this, so it must be changed if this changes. */ + +#define sc_i386_thread_state sc_gs /* Beginning of correspondence. */ + /* Segment registers. */ + int sc_gs; + int sc_fs; + int sc_es; + int sc_ds; + + long sc_r8; + long sc_r9; + long sc_r10; + long sc_r11; + long sc_r12; + long sc_r13; + long sc_r14; + long sc_r15; + long sc_rdi; + long sc_rsi; + long sc_rbp; + long sc_rsp; /* Not used; sc_ursp is used instead. */ + long sc_rbx; + long sc_rdx; + long sc_rcx; + long sc_rax; + long sc_rip; /* Instruction pointer. */ + + int sc_cs; /* Code segment register. */ + + long sc_rfl; /* Processor flags. */ + + long sc_ursp; /* This stack pointer is used. */ + int sc_ss; /* Stack segment register. */ + + /* Following mimics struct i386_float_state. Structures and symbolic + values can be found in . */ +#define sc_i386_float_state sc_fpkind + int sc_fpkind; /* FP_NO, FP_387, etc. */ + int sc_fpused; /* If zero, ignore rest of float state. */ + struct i386_fp_save sc_fpsave; + struct i386_fp_regs sc_fpregs; + int sc_fpexcsr; /* FPSR including exception bits. */ + }; + +/* Traditional BSD names for some members. */ +#define sc_sp sc_ursp /* Stack pointer. */ +#define sc_fp sc_rbp /* Frame pointer. */ +#define sc_pc sc_rip /* Process counter. */ +#define sc_ps sc_rfl + + +/* The deprecated sigcode values below are passed as an extra, non-portable + argument to regular signal handlers. You should use SA_SIGINFO handlers + instead, which use the standard POSIX signal codes. */ + +/* Codes for SIGFPE. */ +#define FPE_INTOVF_TRAP 0x1 /* integer overflow */ +#define FPE_INTDIV_FAULT 0x2 /* integer divide by zero */ +#define FPE_FLTOVF_FAULT 0x3 /* floating overflow */ +#define FPE_FLTDIV_FAULT 0x4 /* floating divide by zero */ +#define FPE_FLTUND_FAULT 0x5 /* floating underflow */ +#define FPE_SUBRNG_FAULT 0x7 /* BOUNDS instruction failed */ +#define FPE_FLTDNR_FAULT 0x8 /* denormalized operand */ +#define FPE_FLTINX_FAULT 0x9 /* floating loss of precision */ +#define FPE_EMERR_FAULT 0xa /* mysterious emulation error 33 */ +#define FPE_EMBND_FAULT 0xb /* emulation BOUNDS instruction failed */ + +/* Codes for SIGILL. */ +#define ILL_INVOPR_FAULT 0x1 /* invalid operation */ +#define ILL_STACK_FAULT 0x2 /* fault on microkernel stack access */ +#define ILL_FPEOPR_FAULT 0x3 /* invalid floating operation */ + +/* Codes for SIGTRAP. */ +#define DBG_SINGLE_TRAP 0x1 /* single step */ +#define DBG_BRKPNT_FAULT 0x2 /* breakpoint instruction */ + +#endif /* bits/sigcontext.h */ diff --git a/sysdeps/mach/hurd/x86_64/sys/ucontext.h b/sysdeps/mach/hurd/x86_64/sys/ucontext.h new file mode 100644 index 00000000..d73a8937 --- /dev/null +++ b/sysdeps/mach/hurd/x86_64/sys/ucontext.h @@ -0,0 +1,157 @@ +/* Copyright (C) 2001-2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _SYS_UCONTEXT_H +#define _SYS_UCONTEXT_H 1 + +#include + +#include +#include +#include + + +#ifdef __USE_MISC +# define __ctx(fld) fld +#else +# define __ctx(fld) __ ## fld +#endif + +/* Type for general register. */ +__extension__ typedef long long int greg_t; + +/* Number of general registers. */ +#define __NGREG 23 +#ifdef __USE_MISC +# define NGREG __NGREG +#endif + +/* Container for all general registers. */ +typedef greg_t gregset_t[__NGREG]; + +#ifdef __USE_GNU +/* Number of each register in the `gregset_t' array. */ +enum +{ + REG_GSFS = 0, /* Actually int gs, fs. */ +# define REG_GSFS REG_GSFS + REG_ESDS, /* Actually int es, ds. */ +# define REG_ESDS REG_ESDS + REG_R8, +# define REG_R8 REG_R8 + REG_R9, +# define REG_R9 REG_R9 + REG_R10, +# define REG_R10 REG_R10 + REG_R11, +# define REG_R11 REG_R11 + REG_R12, +# define REG_R12 REG_R12 + REG_R13, +# define REG_R13 REG_R13 + REG_R14, +# define REG_R14 REG_R14 + REG_R15, +# define REG_R15 REG_R15 + REG_RDI, +# define REG_RDI REG_RDI + REG_RSI, +# define REG_RSI REG_RSI + REG_RBP, +# define REG_RBP REG_RBP + REG_RSP, +# define REG_RSP REG_RSP + REG_RBX, +# define REG_RBX REG_RBX + REG_RDX, +# define REG_RDX REG_RDX + REG_RCX, +# define REG_RCX REG_RCX + REG_RAX, +# define REG_RAX REG_RAX + REG_RIP, +# define REG_RIP REG_RIP + REG_CS, /* Actually int cs, pad. */ +# define REG_CS REG_CS + REG_RFL, +# define REG_RFL REG_RFL + REG_ERR, +# define REG_ERR REG_ERR + REG_TRAPNO, +# define REG_TRAPNO REG_TRAPNO + REG_OLDMASK, +# define REG_OLDMASK REG_OLDMASK + REG_CR2 +# define REG_CR2 REG_CR2 +}; +#endif + +struct _libc_fpxreg +{ + unsigned short int __ctx(significand)[4]; + unsigned short int __ctx(exponent); + unsigned short int __glibc_reserved1[3]; +}; + +struct _libc_xmmreg +{ + __uint32_t __ctx(element)[4]; +}; + +struct _libc_fpstate +{ + /* 64-bit FXSAVE format. */ + __uint16_t __ctx(cwd); + __uint16_t __ctx(swd); + __uint16_t __ctx(ftw); + __uint16_t __ctx(fop); + __uint64_t __ctx(rip); + __uint64_t __ctx(rdp); + __uint32_t __ctx(mxcsr); + __uint32_t __ctx(mxcr_mask); + struct _libc_fpxreg _st[8]; + struct _libc_xmmreg _xmm[16]; + __uint32_t __glibc_reserved1[24]; +}; + +/* Structure to describe FPU registers. */ +typedef struct _libc_fpstate *fpregset_t; + +/* Context to describe whole processor state. */ +typedef struct + { + gregset_t __ctx(gregs); + /* Note that fpregs is a pointer. */ + fpregset_t __ctx(fpregs); + __extension__ unsigned long long __reserved1 [8]; +} mcontext_t; + +/* Userlevel context. */ +typedef struct ucontext_t + { + unsigned long int __ctx(uc_flags); + struct ucontext_t *uc_link; + stack_t uc_stack; + mcontext_t uc_mcontext; + sigset_t uc_sigmask; + struct _libc_fpstate __fpregs_mem; + __extension__ unsigned long long int __ssp[4]; + } ucontext_t; + +#undef __ctx + +#endif /* sys/ucontext.h */ diff --git a/sysdeps/mach/hurd/x86_64/ucontext_i.sym b/sysdeps/mach/hurd/x86_64/ucontext_i.sym new file mode 100644 index 00000000..7e536956 --- /dev/null +++ b/sysdeps/mach/hurd/x86_64/ucontext_i.sym @@ -0,0 +1,38 @@ +#include +#include +#include + +-- + +SIG_BLOCK +SIG_SETMASK + +_NSIG8 (_NSIG / 8) + +#define ucontext(member) offsetof (ucontext_t, member) +#define mcontext(member) ucontext (uc_mcontext.member) +#define mreg(reg) mcontext (gregs[REG_##reg]) + +oRBP mreg (RBP) +oRSP mreg (RSP) +oRBX mreg (RBX) +oR8 mreg (R8) +oR9 mreg (R9) +oR10 mreg (R10) +oR11 mreg (R11) +oR12 mreg (R12) +oR13 mreg (R13) +oR14 mreg (R14) +oR15 mreg (R15) +oRDI mreg (RDI) +oRSI mreg (RSI) +oRDX mreg (RDX) +oRAX mreg (RAX) +oRCX mreg (RCX) +oRIP mreg (RIP) +oRFL mreg (RFL) +oFPREGS mcontext (fpregs) +oSIGMASK ucontext (uc_sigmask) +oFPREGSMEM ucontext (__fpregs_mem) +oMXCSR ucontext (__fpregs_mem.mxcsr) +oSSP ucontext (__ssp)