From patchwork Wed Dec 7 08:52:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Noah Goldstein X-Patchwork-Id: 61636 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3B08039960D8 for ; Wed, 7 Dec 2022 08:56:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3B08039960D8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1670403416; bh=8I4QbBnUnYjIX3cVdGS14jZ7kgGdsxo3kA7TakAIaus=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=hK7YtZMQyV0ulmC0wt5hSxgoSaQlOCHXZz3gF2G0IXDyHFK9c+y5ILeFMrlh9aAGI Y4f1b/6pc6W2NtXBokJqKvr+/vFhuYnBWNyJEBAalq6UV0LR1QFpajkGgihN5fwyTg 8/hsm5+tUsbUxxIhSXhSVfgjhpzYeSxy/cbn+HL4= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by sourceware.org (Postfix) with ESMTPS id 1DB0F3949094 for ; Wed, 7 Dec 2022 08:53:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1DB0F3949094 Received: by mail-ej1-x629.google.com with SMTP id qk9so12358177ejc.3 for ; Wed, 07 Dec 2022 00:53:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8I4QbBnUnYjIX3cVdGS14jZ7kgGdsxo3kA7TakAIaus=; b=son4iVnEhZJuhqqr+u2cZjxJdbRQWXYcLb8Tli5XbTlM+qZiwUofirFSxXZK2GVVFe SMDfqLTd4GkFBDpBzRDnnMqC2qXZnsUXL3DkQdncYFwu95H7weCJdVwkvHrCDaNXu7jw ZUEYXfRgUOe1DW8l0Vr5e/wuQ7pa49hY3nEPlZ5nar96rQ4xv9ITgJhoCMQdH+4aPOzn rPp66CDg2KTSIGQmB0VNSzmUudvofsbHhdlW7PotEoH2GKzA1FnVaqHSPwQVHQ9k3oWS PeJPu9wfv0nzCIvNgp6B9rxcSlmpjc3Bn769LjFu1pDGZhbieCjtruPv9HljoMuNumex br9w== X-Gm-Message-State: ANoB5pljSRMq1X5gfuH2Hnm9Hh2MUQiQPgkA67IAbHMtFIcoLBhNCbv6 JbZWwQ2mKpU+C8TW5AYUvjGXKPZfbzI= X-Google-Smtp-Source: AA0mqf6NCOPjiDvoSSXKIzH1I5znjSLJXAIGEFA8EkPlfbE+IEEqqbdDO871mNYuVZFgYfeI5cD5cw== X-Received: by 2002:a17:906:444b:b0:7ad:dd43:5d53 with SMTP id i11-20020a170906444b00b007addd435d53mr57606493ejp.376.1670403200592; Wed, 07 Dec 2022 00:53:20 -0800 (PST) Received: from noahgold-desk.lan (2603-8080-1301-76c6-feb7-1b9b-f2dd-08f7.res6.spectrum.com. [2603:8080:1301:76c6:feb7:1b9b:f2dd:8f7]) by smtp.gmail.com with ESMTPSA id k17-20020aa7c051000000b0046bd3b366f9sm1931767edo.32.2022.12.07.00.53.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 00:53:20 -0800 (PST) To: libc-alpha@sourceware.org Cc: goldstein.w.n@gmail.com, hjl.tools@gmail.com, andrey.kolesov@intel.com, carlos@systemhalted.org Subject: [PATCH v1 22/27] x86/fpu: Optimize svml_s_log2f4_core_sse4.S Date: Wed, 7 Dec 2022 00:52:31 -0800 Message-Id: <20221207085236.1424424-22-goldstein.w.n@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221207085236.1424424-1-goldstein.w.n@gmail.com> References: <20221207085236.1424424-1-goldstein.w.n@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Noah Goldstein via Libc-alpha From: Noah Goldstein Reply-To: Noah Goldstein Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" 1. Improve special values case which ends up covering ~half of all float bit patterns. 2. Cleanup some missed optimizations in instruction selection / unnecissary repeated rodata references. 3. Remove unused rodata. 4. Use common data definitions where possible. Code Size Change: -56 Bytes (256 - 312) Input New Time / Old Time 0F (0x00000000) -> 0.9048 0F (0x0000ffff, Denorm) -> 0.9910 .1F (0x3dcccccd) -> 0.9399 5F (0x40a00000) -> 0.9425 2315255808F (0x4f0a0000) -> 0.9312 -NaN (0xffffffff) -> 0.9230 --- .../fpu/multiarch/svml_s_log2f4_core_sse4.S | 292 +++++++----------- 1 file changed, 115 insertions(+), 177 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S index bc6a778b75..b877bbb034 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S @@ -27,196 +27,134 @@ * */ -/* Offsets for data table __svml_slog2_data_internal - */ -#define MinNorm 0 -#define MaxNorm 16 -#define iBrkValue 32 -#define iOffExpoMask 48 -#define One 64 -#define sPoly 80 +#define LOCAL_DATA_NAME __svml_slog2_data_internal +#include "svml_s_common_sse4_rodata_offsets.h" +/* Offsets for data table __svml_slog2_data_internal. */ +#define _Coeff_3 0 +#define _Coeff_2 16 +#define _Coeff_7 32 +#define _Coeff_6 48 +#define _Coeff_9 64 +#define _Coeff_8 80 +#define _Coeff_5 96 +#define _Coeff_4 112 +#define _Coeff_1 128 + #include .section .text.sse4, "ax", @progbits ENTRY(_ZGVbN4v_log2f_sse4) - subq $72, %rsp - cfi_def_cfa_offset(80) - movaps %xmm0, %xmm1 - - /* reduction: compute r, n */ - movdqu iBrkValue+__svml_slog2_data_internal(%rip), %xmm2 - movaps %xmm0, %xmm4 - movdqu iOffExpoMask+__svml_slog2_data_internal(%rip), %xmm10 - psubd %xmm2, %xmm1 - pand %xmm1, %xmm10 - movaps %xmm0, %xmm3 - paddd %xmm2, %xmm10 - psrad $23, %xmm1 - movups sPoly+__svml_slog2_data_internal(%rip), %xmm5 - movups sPoly+32+__svml_slog2_data_internal(%rip), %xmm6 - movups sPoly+64+__svml_slog2_data_internal(%rip), %xmm7 - movups sPoly+96+__svml_slog2_data_internal(%rip), %xmm9 - cmpltps MinNorm+__svml_slog2_data_internal(%rip), %xmm4 - cmpnleps MaxNorm+__svml_slog2_data_internal(%rip), %xmm3 - cvtdq2ps %xmm1, %xmm1 - subps One+__svml_slog2_data_internal(%rip), %xmm10 - mulps %xmm10, %xmm5 - movaps %xmm10, %xmm8 - mulps %xmm10, %xmm6 - mulps %xmm10, %xmm8 - addps sPoly+16+__svml_slog2_data_internal(%rip), %xmm5 - mulps %xmm10, %xmm7 - addps sPoly+48+__svml_slog2_data_internal(%rip), %xmm6 - mulps %xmm10, %xmm9 - mulps %xmm8, %xmm5 - addps sPoly+80+__svml_slog2_data_internal(%rip), %xmm7 - addps sPoly+112+__svml_slog2_data_internal(%rip), %xmm9 - addps %xmm5, %xmm6 - mulps %xmm8, %xmm6 - orps %xmm3, %xmm4 - - /* combine and get argument value range mask */ - movmskps %xmm4, %edx - addps %xmm6, %xmm7 - mulps %xmm7, %xmm8 - addps %xmm8, %xmm9 - mulps %xmm10, %xmm9 - addps sPoly+128+__svml_slog2_data_internal(%rip), %xmm9 - mulps %xmm9, %xmm10 - addps %xmm10, %xmm1 - testl %edx, %edx - - /* Go to special inputs processing branch */ + movdqu COMMON_DATA(_NotiOffExpoMask)(%rip), %xmm1 + movaps %xmm0, %xmm2 + psubd %xmm1, %xmm0 + movaps COMMON_DATA(_ILoRange)(%rip), %xmm5 + + pcmpgtd %xmm0, %xmm5 + /* combine and get argument value range mask. */ + movmskps %xmm5, %eax + /* reduction: compute r, n. */ + movdqu COMMON_DATA(_IBrkValue)(%rip), %xmm0 + movaps %xmm2, %xmm5 + psubd %xmm0, %xmm2 + pandn %xmm2, %xmm1 + paddd %xmm0, %xmm1 + psrad $0x17, %xmm2 + cvtdq2ps %xmm2, %xmm0 + subps COMMON_DATA(_OneF)(%rip), %xmm1 + movups LOCAL_DATA(_Coeff_3)(%rip), %xmm2 + mulps %xmm1, %xmm2 + addps LOCAL_DATA(_Coeff_2)(%rip), %xmm2 + movups LOCAL_DATA(_Coeff_7)(%rip), %xmm4 + mulps %xmm1, %xmm4 + addps LOCAL_DATA(_Coeff_6)(%rip), %xmm4 + movups LOCAL_DATA(_Coeff_9)(%rip), %xmm3 + mulps %xmm1, %xmm3 + addps LOCAL_DATA(_Coeff_8)(%rip), %xmm3 + movaps %xmm1, %xmm6 + mulps %xmm1, %xmm1 + mulps %xmm1, %xmm3 + addps %xmm3, %xmm4 + mulps %xmm1, %xmm4 + movups LOCAL_DATA(_Coeff_5)(%rip), %xmm3 + mulps %xmm6, %xmm3 + addps LOCAL_DATA(_Coeff_4)(%rip), %xmm3 + addps %xmm4, %xmm3 + mulps %xmm3, %xmm1 + addps %xmm1, %xmm2 + mulps %xmm6, %xmm2 + addps LOCAL_DATA(_Coeff_1)(%rip), %xmm2 + mulps %xmm2, %xmm6 + addps %xmm6, %xmm0 + testl %eax, %eax + /* Go to special inputs processing branch. */ jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm1 - - /* Restore registers - * and exit the function - */ - -L(EXIT): - movaps %xmm1, %xmm0 - addq $72, %rsp - cfi_def_cfa_offset(8) ret - cfi_def_cfa_offset(80) - - /* Branch to process - * special inputs - */ + /* Cold case. edx has 1s where there was a special value that + more so than speed here. */ L(SPECIAL_VALUES_BRANCH): - movups %xmm0, 32(%rsp) - movups %xmm1, 48(%rsp) - # LOE rbx rbp r12 r13 r14 r15 edx - - xorl %eax, %eax - movq %r12, 16(%rsp) - cfi_offset(12, -64) - movl %eax, %r12d - movq %r13, 8(%rsp) - cfi_offset(13, -72) - movl %edx, %r13d - movq %r14, (%rsp) - cfi_offset(14, -80) - # LOE rbx rbp r15 r12d r13d - - /* Range mask - * bits check - */ - -L(RANGEMASK_CHECK): - btl %r12d, %r13d - - /* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx rbp r15 r12d r13d - - /* Special inputs - * processing loop - */ - + /* Stack coming in 16-byte aligned. Set 8-byte misaligned so on + call entry will be 16-byte aligned. */ + subq $0x38, %rsp + movups %xmm0, 24(%rsp) + movups %xmm5, 40(%rsp) + + /* Use rbx/rbp for callee save registers as they get short + encoding for many instructions (as compared with r12/r13). */ + movq %rbx, (%rsp) + cfi_offset (rbx, -64) + movq %rbp, 8(%rsp) + cfi_offset (rbp, -56) + /* edx has 1s where there was a special value that needs to be + handled by a tanhf call. */ + movl %eax, %ebx L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $4, %r12d - - /* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx rbp r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - movups 48(%rsp), %xmm1 - - /* Go to exit */ - jmp L(EXIT) - cfi_offset(12, -64) - cfi_offset(13, -72) - cfi_offset(14, -80) - # LOE rbx rbp r12 r13 r14 r15 xmm1 - - /* Scalar math fucntion call - * to process special input - */ - -L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 32(%rsp, %r14, 4), %xmm0 - call log2f@PLT - # LOE rbx rbp r14 r15 r12d r13d xmm0 - movss %xmm0, 48(%rsp, %r14, 4) + /* use rbp as index for special value that is saved across calls + to tanhf. We technically don't need a callee save register + here as offset to rsp is always [0, 12] so we can restore + rsp by realigning to 64. Essentially the tradeoff is 1 extra + save/restore vs 2 extra instructions in the loop. */ + xorl %ebp, %ebp + bsfl %ebx, %ebp + + /* Scalar math fucntion call to process special input. */ + movss 40(%rsp, %rbp, 4), %xmm0 + call log2f@PLT - /* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx rbp r15 r12d r13d + /* No good way to avoid the store-forwarding fault this will + cause on return. `lfence` avoids the SF fault but at greater + cost as it serialized stack/callee save restoration. */ + movss %xmm0, 24(%rsp, %rbp, 4) + + leal -1(%rbx), %eax + andl %eax, %ebx + jnz L(SPECIAL_VALUES_LOOP) + + /* All results have been written to 24(%rsp). */ + movups 24(%rsp), %xmm0 + movq (%rsp), %rbx + cfi_restore (rbx) + movq 8(%rsp), %rbp + cfi_restore (rbp) + addq $56, %rsp + cfi_def_cfa_offset (8) + ret END(_ZGVbN4v_log2f_sse4) - .section .rodata, "a" + .section .rodata.sse4, "a" .align 16 -#ifdef __svml_slog2_data_internal_typedef -typedef unsigned int VUINT32; -typedef struct { - __declspec(align(16)) VUINT32 MinNorm[4][1]; - __declspec(align(16)) VUINT32 MaxNorm[4][1]; - __declspec(align(16)) VUINT32 iBrkValue[4][1]; - __declspec(align(16)) VUINT32 iOffExpoMask[4][1]; - __declspec(align(16)) VUINT32 One[4][1]; - __declspec(align(16)) VUINT32 sPoly[9][4][1]; -} __svml_slog2_data_internal; -#endif -__svml_slog2_data_internal: - /* MinNorm */ - .long 0x00800000, 0x00800000, 0x00800000, 0x00800000 - /* MaxNorm */ - .align 16 - .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff - /* iBrkValue = SP 2/3 */ - .align 16 - .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab - /* iOffExpoMask = SP significand mask */ - .align 16 - .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff - /* sOne = SP 1.0 */ - .align 16 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 - /* spoly[9] */ - .align 16 - .long 0x3e554012, 0x3e554012, 0x3e554012, 0x3e554012 /* coeff9 */ - .long 0xbe638E14, 0xbe638E14, 0xbe638E14, 0xbe638E14 /* coeff8 */ - .long 0x3e4D660B, 0x3e4D660B, 0x3e4D660B, 0x3e4D660B /* coeff7 */ - .long 0xbe727824, 0xbe727824, 0xbe727824, 0xbe727824 /* coeff6 */ - .long 0x3e93DD07, 0x3e93DD07, 0x3e93DD07, 0x3e93DD07 /* coeff5 */ - .long 0xbeB8B969, 0xbeB8B969, 0xbeB8B969, 0xbeB8B969 /* coeff4 */ - .long 0x3eF637C0, 0x3eF637C0, 0x3eF637C0, 0x3eF637C0 /* coeff3 */ - .long 0xbf38AA2B, 0xbf38AA2B, 0xbf38AA2B, 0xbf38AA2B /* coeff2 */ - .long 0x3fB8AA3B, 0x3fB8AA3B, 0x3fB8AA3B, 0x3fB8AA3B /* coeff1 */ - .align 16 - .type __svml_slog2_data_internal, @object - .size __svml_slog2_data_internal, .-__svml_slog2_data_internal +LOCAL_DATA_NAME: + DATA_VEC (LOCAL_DATA_NAME, _Coeff_3, 0x3ef637c0) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_2, 0xbf38aa2b) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_7, 0x3e4d660b) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_6, 0xbe727824) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_9, 0x3e554012) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_8, 0xbe638e14) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_5, 0x3e93dd07) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_4, 0xbeb8b969) + DATA_VEC (LOCAL_DATA_NAME, _Coeff_1, 0x3fb8aa3b) + .type LOCAL_DATA_NAME, @object + .size LOCAL_DATA_NAME, .-LOCAL_DATA_NAME