[v2,1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2
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dj/TryBot-apply_patch |
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Patch applied to master at the time it was sent
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Commit Message
Just for clarities sake and so that if a future implementation is
added we remember to add the check.
---
sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
Comments
On Wed, Jun 29, 2022 at 3:05 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> Just for clarities sake and so that if a future implementation is
> added we remember to add the check.
> ---
> sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> index ee36525bcf..973041d23b 100644
> --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> @@ -27,7 +27,11 @@ IFUNC_SELECTOR (void)
> {
> const struct cpu_features* cpu_features = __get_cpu_features ();
>
> - if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
> + /* This function uses slow sse4.2 instructions (pcmpstri) but since
> + there is no other optimized implementation keep using. If an
> + optimized fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P
> + (cpu_features, Slow_SSE4_2) check. */
> + if (ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
> return OPTIMIZE (sse42);
>
> return OPTIMIZE (generic);
> --
> 2.34.1
>
LGTM.
Thanks.
On Wed, Jun 29, 2022 at 3:13 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Wed, Jun 29, 2022 at 3:05 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > Just for clarities sake and so that if a future implementation is
> > added we remember to add the check.
> > ---
> > sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 +++++-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > index ee36525bcf..973041d23b 100644
> > --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > @@ -27,7 +27,11 @@ IFUNC_SELECTOR (void)
> > {
> > const struct cpu_features* cpu_features = __get_cpu_features ();
> >
> > - if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
> > + /* This function uses slow sse4.2 instructions (pcmpstri) but since
> > + there is no other optimized implementation keep using. If an
> > + optimized fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P
> > + (cpu_features, Slow_SSE4_2) check. */
> > + if (ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
This was buggy as standalone patch (hidden by the next in series).
Resubmitted with fix in V4.
> > return OPTIMIZE (sse42);
> >
> > return OPTIMIZE (generic);
> > --
> > 2.34.1
> >
>
> LGTM.
>
> Thanks.
>
> --
> H.J.
@@ -27,7 +27,11 @@ IFUNC_SELECTOR (void)
{
const struct cpu_features* cpu_features = __get_cpu_features ();
- if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
+ /* This function uses slow sse4.2 instructions (pcmpstri) but since
+ there is no other optimized implementation keep using. If an
+ optimized fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P
+ (cpu_features, Slow_SSE4_2) check. */
+ if (ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
return OPTIMIZE (sse42);
return OPTIMIZE (generic);