From patchwork Tue Jun 28 15:27:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Noah Goldstein X-Patchwork-Id: 55501 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0B36E38B8D78 for ; Tue, 28 Jun 2022 15:28:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0B36E38B8D78 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1656430109; bh=KwC+hxK+Oeg32yFk4ZO+mp1treGnEGzHX7ZCufY4u9E=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=EDO+++fBpLEtIFC2J1FH/cEwgeuK49/LYQBDTWGuazYuVZzTtquh1LM/nq6A0+bRt we93USM8sJye1JBDowhfqg8oQAUCAWVShxLapaMyMu3TEZVYkeuw1HF/Ou8YvyibcS 1C0+Qotd5MvnihUDCxHooLCKg6tERjou/zOuzHJ0= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 2AF59389988D for ; Tue, 28 Jun 2022 15:27:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2AF59389988D Received: by mail-pg1-x52e.google.com with SMTP id 23so12524541pgc.8 for ; Tue, 28 Jun 2022 08:27:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KwC+hxK+Oeg32yFk4ZO+mp1treGnEGzHX7ZCufY4u9E=; b=XYXkAL6uuANSF5gDP5Mxs8Ag0GGD1lB8N89ca0xBcugrSu2OvfVjiwmdTH+8N4WV8v HEein7/GrWizQfIKWqQg4w4pGLf3HKH+wPR0j2steZSxjM1EqvQCGO7sqRYMvfnQ2+j3 K+9wFMJ9FI/6AOP252gt70EoZUHF2d/8wqgqBezqLsGOzPQWgjVxSib5Z8jlKhUk2V2i 27OabwhToT+chdmXy6KyCZWEq6Bzj2l9WvRGp+AFrXwRxsFoN+O/RkKnEaXUWXCXy6AZ tcSkHIQgnjaphyVALVwhdU1kCxMv0e9U/otnJi+NzYUWnvXwos0JJVGJaKGPeMTbXOo/ rMtQ== X-Gm-Message-State: AJIora9277ZVLjwIS7Ad2zg2Yk86XA1G818N2eRq3w+Tux39vChfHY86 8oWkBvhhttrlheFNJlSMP6SwbxCYOcc= X-Google-Smtp-Source: AGRyM1uHxwd2qtxnJJE0IlTra0GNoBBP0bshX3SMsM+gjRpPFCZBly2qELPa97ImZvKvr20l93Iw7A== X-Received: by 2002:a63:78ce:0:b0:40c:3c04:e3d8 with SMTP id t197-20020a6378ce000000b0040c3c04e3d8mr18066148pgc.202.1656430040011; Tue, 28 Jun 2022 08:27:20 -0700 (PDT) Received: from noah-tgl.. ([192.55.60.43]) by smtp.gmail.com with ESMTPSA id u3-20020a170903108300b0016a613012a0sm9425256pld.210.2022.06.28.08.27.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 08:27:19 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH v1 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 Date: Tue, 28 Jun 2022 08:27:16 -0700 Message-Id: <20220628152717.17838-1-goldstein.w.n@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Noah Goldstein via Libc-alpha From: Noah Goldstein Reply-To: Noah Goldstein Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" Just for clarities sake and so that if a future implementation is added we remember to add the check. --- sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h index ee36525bcf..204c4b5406 100644 --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h @@ -27,7 +27,11 @@ IFUNC_SELECTOR (void) { const struct cpu_features* cpu_features = __get_cpu_features (); - if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) + /* This function uses slow sse4.2 instructions (pcmpstri) but since + there is no other optimized implementation keep using. If an + optimized fallback is added add a X86_ISA_CPU_FEATURE_USABLE_P + (cpu_features, SSE4_2) check. */ + if (ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) return OPTIMIZE (sse42); return OPTIMIZE (generic);