diff mbox series

[v2] riscv: Use memcpy to handle unaligned access when fixing R_RISCV_RELATIVE

Message ID 20220628135218.32074-1-kito.cheng@sifive.com
State Committed
Commit c22d2021a9f9bdea62398976eea4f0e6ef668b7d
Headers
Series [v2] riscv: Use memcpy to handle unaligned access when fixing R_RISCV_RELATIVE |

Checks

Context Check Description
dj/TryBot-apply_patch success Patch applied to master at the time it was sent
dj/TryBot-32bit success Build for i686

Commit Message

Kito Cheng June 28, 2022, 1:52 p.m. UTC 
  Although RISC-V Linux will enable the unaligned memory access handler by
default, that is quite expensive in general, using memcpy will be much cheaper
- just break down that into several load/store byte instructions.

ARM and MIPS has similar issue:

ARM: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51456
MIPS: https://gcc.gnu.org/legacy-ml/gcc-help/2005-07/msg00325.html

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>

---

V2 Changes:

- Fix minor typo
---
 sysdeps/riscv/dl-machine.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Palmer Dabbelt June 30, 2022, 3:06 p.m. UTC | #1 
On Tue, 28 Jun 2022 06:52:19 PDT (-0700), kito.cheng@sifive.com wrote:
> Although RISC-V Linux will enable the unaligned memory access handler by
> default, that is quite expensive in general, using memcpy will be much cheaper
> - just break down that into several load/store byte instructions.
>
> ARM and MIPS has similar issue:
>
> ARM: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51456
> MIPS: https://gcc.gnu.org/legacy-ml/gcc-help/2005-07/msg00325.html
>
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
> Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
>
> ---
>
> V2 Changes:
>
> - Fix minor typo
> ---
>  sysdeps/riscv/dl-machine.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
> index 4bb858adaa..dfedc9801d 100644
> --- a/sysdeps/riscv/dl-machine.h
> +++ b/sysdeps/riscv/dl-machine.h
> @@ -157,7 +157,10 @@ __attribute__ ((always_inline))
>  elf_machine_rela_relative (ElfW(Addr) l_addr, const ElfW(Rela) *reloc,
>  			  void *const reloc_addr)
>  {
> -  *(ElfW(Addr) *) reloc_addr = l_addr + reloc->r_addend;
> +  /* R_RISCV_RELATIVE might located in debug info section which might not
> +     aligned to XLEN bytes.  Also support relocations on unaligned offsets.  */
> +  ElfW(Addr) value = l_addr + reloc->r_addend;
> +  memcpy (reloc_addr, &value, sizeof value);
>  }
>
>  /* Perform a relocation described by R_INFO at the location pointed to

Committed.  Thanks!
diff mbox series

Patch

diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
index 4bb858adaa..dfedc9801d 100644
--- a/sysdeps/riscv/dl-machine.h
+++ b/sysdeps/riscv/dl-machine.h
@@ -157,7 +157,10 @@  __attribute__ ((always_inline))
 elf_machine_rela_relative (ElfW(Addr) l_addr, const ElfW(Rela) *reloc,
 			  void *const reloc_addr)
 {
-  *(ElfW(Addr) *) reloc_addr = l_addr + reloc->r_addend;
+  /* R_RISCV_RELATIVE might located in debug info section which might not
+     aligned to XLEN bytes.  Also support relocations on unaligned offsets.  */
+  ElfW(Addr) value = l_addr + reloc->r_addend;
+  memcpy (reloc_addr, &value, sizeof value);
 }
 
 /* Perform a relocation described by R_INFO at the location pointed to