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[73.231.94.136]) by smtp.gmail.com with ESMTPSA id 71-20020a63034a000000b0040d2d9f15e0sm756682pgd.20.2022.06.23.23.37.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jun 2022 23:37:57 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH v1 3/7] x86: Add macro for NOT of a cpu arch feature and improve comments Date: Thu, 23 Jun 2022 23:36:50 -0700 Message-Id: <20220624063653.2126416-3-goldstein.w.n@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220624063653.2126416-1-goldstein.w.n@gmail.com> References: <20220624063653.2126416-1-goldstein.w.n@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Noah Goldstein via Libc-alpha From: Noah Goldstein Reply-To: Noah Goldstein Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" Some ARCH_P features such as Prefer_No_VZEROUPPER used to disable implementations if true as opposed fo the majority of features such as AVX2 which are used to enabled features. Different ISA build levels want override certain disabling features. For example ISA build level >= 3 should ignore Prefer_No_VZEROUPPER which means converting the check to false (as opposed to true for a feature like AVX2). --- sysdeps/x86/isa-ifunc-macros.h | 4 ++++ sysdeps/x86/isa-level.h | 7 ++++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/sysdeps/x86/isa-ifunc-macros.h b/sysdeps/x86/isa-ifunc-macros.h index ba6826d518..e229e612a4 100644 --- a/sysdeps/x86/isa-ifunc-macros.h +++ b/sysdeps/x86/isa-ifunc-macros.h @@ -67,4 +67,8 @@ (X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ || CPU_FEATURES_ARCH_P (ptr, name)) +#define X86_ISA_CPU_FEATURES_ARCH_P_NOT(ptr, name) \ + (!X86_ISA_CPU_FEATURE_CONST_CHECK_ENABLED (name) \ + && !CPU_FEATURES_ARCH_P (ptr, name)) + #endif diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h index 7cae11c228..e1a30ed83e 100644 --- a/sysdeps/x86/isa-level.h +++ b/sysdeps/x86/isa-level.h @@ -66,10 +66,10 @@ /* - * CPU Features that are hard coded as enabled depending on ISA build - * level. + * CPU Features that are hard coded as enabled/disabled depending on + * ISA build level. * - Values > 0 features are always ENABLED if: - * Value >= MINIMUM_X86_ISA_LEVEL + * Value <= MINIMUM_X86_ISA_LEVEL */ @@ -92,6 +92,7 @@ /* * KNL (the only cpu that sets this supported in cpu-features.h) * builds with ISA V1 so this shouldn't harm any architectures. + * NB: Only use this feature with the ARCH_P_NOT macro. */ #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3