From patchwork Tue Jan 18 04:31:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Chen X-Patchwork-Id: 50133 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DA4453857C49 for ; Tue, 18 Jan 2022 04:33:13 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by sourceware.org (Postfix) with ESMTPS id 061B5385802F for ; Tue, 18 Jan 2022 04:32:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 061B5385802F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pl1-x632.google.com with SMTP id n8so10072682plc.3 for ; Mon, 17 Jan 2022 20:32:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5SfbcGIV4UE3oFi4PEQCwir34CVkdqIqOPWcKqRxMgA=; b=kZBKeIF6DY0dKv6Jdexw0+F7EX82CJrG92KW538ESg3RCFIpJKu5KGtf72ji1YrW9W IUPqYk6Bjw13SWn8899kK5eMCcIWTAcdKSHYEryWPa3K6eTBKRveKiVKvZ/Iws7lYPaS hmitqLgo0RMPSPyFnSPFSKJGmj96xsNIrccbivoyoBV3FtG9j9f9DR15iV9AMxq5LM6r MVbbLBi6p49dnnHhyPmQE5ABc++5eGxHJ7k7ecc148INpDGFDWvj2LvdolAD7BRMR6n0 kntjJGd/rvxEvS/rMMFPODOf2FvPeQnH/62InkmGpoaLBU3hxtNfeyXlN8JoaMyFJcYK o6Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5SfbcGIV4UE3oFi4PEQCwir34CVkdqIqOPWcKqRxMgA=; b=xTKU6ebEgmtiJZo3A+NIOg0c9/p5RU3OWwrqH+RqRicAD3/P0eYNbnw2eAx38yIzLz YQFhhqkf4YlP6oeTVsdXtWaVRu3SsDlRgV024U7ad4GfGYg0j/ujFWkp5bvOsyvzdiOB bR/TryX8XS4BtshaiD7xot4dMbMorSA6eTlU07qYJ9uqMOHdvnWJ7GVMA3fHFvMO8/p4 LYx7j+aHAemugvO8CqhoSNbxzFBR4vLXq4Kzfpnmi/4xqfE5R+RXuvkHOJWst/1JH6Ee 2qFk2nc2aEGyisHQWalEPJ5maOKi8O82atjmJdjQKSunAeMnC6ahiWPdFNCbPe6TKNkO 7GTg== X-Gm-Message-State: AOAM531+OET2F+Hq6fwAVzaDxvGSpWyLUes33Rhr87VHCCU/WrjmbDmO +7FlPYkeBGzYkl6Cfa4IEvbGhoXjNEM7Aw== X-Google-Smtp-Source: ABdhPJxjXopQiTTDgfKZ3nVufkszG2ezuSyuQnAnUBOXhMEzGuMW9QfG+2oT4Q1S4x306qcJ9uPRHA== X-Received: by 2002:a17:90b:1b4a:: with SMTP id nv10mr28803280pjb.190.1642480335941; Mon, 17 Jan 2022 20:32:15 -0800 (PST) Received: from VincentChen-ThinkPad-T480s.internal.sifive.com (36-226-198-98.dynamic-ip.hinet.net. [36.226.198.98]) by smtp.gmail.com with ESMTPSA id y69sm15646861pfg.171.2022.01.17.20.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 20:32:15 -0800 (PST) From: Vincent Chen To: libc-alpha@sourceware.org, palmer@dabbelt.com, darius@bluespec.com, andrew@sifive.com, dj@redhat.com Subject: [PATCH v2 2/2] riscv: Resolve symbols directly for symbols with STO_RISCV_VARIANT_CC. Date: Tue, 18 Jan 2022 12:31:59 +0800 Message-Id: <20220118043159.27521-3-vincent.chen@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220118043159.27521-1-vincent.chen@sifive.com> References: <20220118043159.27521-1-vincent.chen@sifive.com> X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: greentime.hu@sifive.com, kito.cheng@sifive.com, Hsiangkai Wang , Vincent Chen Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" From: Hsiangkai Wang In some cases, we do not want to go through the resolver for function calls. For example, functions with vector arguments will use vector registers to pass arguments. In the resolver, we do not save/restore the vector argument registers for lazy binding efficiency. To avoid ruining the vector arguments, functions with vector arguments will not go through the resolver. To achieve the goal, we will annotate the function symbols with STO_RISCV_VARIANT_CC flag and add DT_RISCV_VARIANT_CC tag in the dynamic section. In the first pass on PLT relocations, we do not set up to call _dl_runtime_resolve. Instead, we resolve the functions directly. Signed-off-by: Hsiangkai Wang Signed-off-by: Vincent Chen --- elf/elf.h | 7 +++++++ manual/platform.texi | 6 ++++++ sysdeps/riscv/dl-dtprocnum.h | 21 +++++++++++++++++++++ sysdeps/riscv/dl-machine.h | 26 ++++++++++++++++++++++++++ 4 files changed, 60 insertions(+) create mode 100644 sysdeps/riscv/dl-dtprocnum.h diff --git a/elf/elf.h b/elf/elf.h index 0735f6b579..9c95544050 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -3911,6 +3911,13 @@ enum #define R_TILEGX_NUM 130 +/* RISC-V specific values for the Dyn d_tag field. */ +#define DT_RISCV_VARIANT_CC (DT_LOPROC + 1) +#define DT_RISCV_NUM 2 + +/* RISC-V specific values for the st_other field. */ +#define STO_RISCV_VARIANT_CC 0x80 + /* RISC-V ELF Flags */ #define EF_RISCV_RVC 0x0001 #define EF_RISCV_FLOAT_ABI 0x0006 diff --git a/manual/platform.texi b/manual/platform.texi index d5fdc5bd05..a1a740f381 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -121,6 +121,12 @@ when it is not allowed, the priority is set to medium. @node RISC-V @appendixsec RISC-V-specific Facilities +Functions that are lazily bound must be compatible with the standard calling +convention. When a function is annotated with STO_RISCV_VARIANT_CC, it means +this function is not compatible with the standard calling convention. The +dynamic linker will directly resolve it instead of using the lazy binding +mechanism. + Cache management facilities specific to RISC-V systems that implement the Linux ABI are declared in @file{sys/cachectl.h}. diff --git a/sysdeps/riscv/dl-dtprocnum.h b/sysdeps/riscv/dl-dtprocnum.h new file mode 100644 index 0000000000..f189fd700a --- /dev/null +++ b/sysdeps/riscv/dl-dtprocnum.h @@ -0,0 +1,21 @@ +/* Configuration of lookup functions. RISC-V version. + Copyright (C) 2019-2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +/* Number of extra dynamic section entries for this architecture. By + default there are none. */ +#define DT_THISPROCNUM DT_RISCV_NUM diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h index 1d3e2e588c..cdbaca6533 100644 --- a/sysdeps/riscv/dl-machine.h +++ b/sysdeps/riscv/dl-machine.h @@ -53,6 +53,9 @@ || (__WORDSIZE == 64 && (type) == R_RISCV_TLS_TPREL64))) \ | (ELF_RTYPE_CLASS_COPY * ((type) == R_RISCV_COPY))) +//* Translate a processor specific dynamic tag to the index in l_info array. */ +#define DT_RISCV(x) (DT_RISCV_##x - DT_LOPROC + DT_NUM) + /* Return nonzero iff ELF header is compatible with the running host. */ static inline int __attribute_used__ elf_machine_matches_host (const ElfW(Ehdr) *ehdr) @@ -305,6 +308,29 @@ elf_machine_lazy_rel (struct link_map *map, struct r_scope_elem *scope[], /* Check for unexpected PLT reloc type. */ if (__glibc_likely (r_type == R_RISCV_JUMP_SLOT)) { + if (__glibc_unlikely (map->l_info[DT_RISCV (VARIANT_CC)] != NULL)) + { + /* Check the symbol table for variant CC symbols. */ + const Elf_Symndx symndx = ELFW(R_SYM) (reloc->r_info); + const ElfW(Sym) *symtab = + (const void *)D_PTR (map, l_info[DT_SYMTAB]); + const ElfW(Sym) *sym = &symtab[symndx]; + if (__glibc_unlikely (sym->st_other & STO_RISCV_VARIANT_CC)) + { + /* Avoid lazy resolution of variant CC symbols. */ + const struct r_found_version *version = NULL; + if (map->l_info[VERSYMIDX (DT_VERSYM)] != NULL) + { + const ElfW(Half) *vernum = + (const void *)D_PTR (map, l_info[VERSYMIDX (DT_VERSYM)]); + version = &map->l_versions[vernum[symndx] & 0x7fff]; + } + elf_machine_rela (map, scope, reloc, sym, version, reloc_addr, + skip_ifunc); + return; + } + } + if (__glibc_unlikely (map->l_mach.plt == 0)) { if (l_addr)