diff mbox series

[05/42] x86-64: Add vector asin/asinf implementation to libmvec

Message ID 20211124193807.2093208-6-skpgkp2@gmail.com
State Changes Requested
Headers show
Series x86-64: Add vector math functions to libmvec | expand

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Commit Message

Sunil Pandey Nov. 24, 2021, 7:37 p.m. UTC
Implement vectorized asin/asinf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector asin/asinf with regenerated ulps.
---
 bits/libm-simd-decl-stubs.h                   |   11 +
 math/bits/mathcalls.h                         |    2 +-
 .../unix/sysv/linux/x86_64/libmvec.abilist    |    8 +
 sysdeps/x86/fpu/bits/math-vector.h            |    4 +
 sysdeps/x86_64/fpu/Makeconfig                 |    1 +
 sysdeps/x86_64/fpu/Versions                   |    2 +
 sysdeps/x86_64/fpu/libm-test-ulps             |   20 +
 .../fpu/multiarch/svml_d_asin2_core-sse2.S    |   20 +
 .../x86_64/fpu/multiarch/svml_d_asin2_core.c  |   27 +
 .../fpu/multiarch/svml_d_asin2_core_sse4.S    | 2765 +++++++++++++++++
 .../fpu/multiarch/svml_d_asin4_core-sse.S     |   20 +
 .../x86_64/fpu/multiarch/svml_d_asin4_core.c  |   27 +
 .../fpu/multiarch/svml_d_asin4_core_avx2.S    | 2647 ++++++++++++++++
 .../fpu/multiarch/svml_d_asin8_core-avx2.S    |   20 +
 .../x86_64/fpu/multiarch/svml_d_asin8_core.c  |   27 +
 .../fpu/multiarch/svml_d_asin8_core_avx512.S  | 2523 +++++++++++++++
 .../fpu/multiarch/svml_s_asinf16_core-avx2.S  |   20 +
 .../fpu/multiarch/svml_s_asinf16_core.c       |   28 +
 .../multiarch/svml_s_asinf16_core_avx512.S    | 2173 +++++++++++++
 .../fpu/multiarch/svml_s_asinf4_core-sse2.S   |   20 +
 .../x86_64/fpu/multiarch/svml_s_asinf4_core.c |   28 +
 .../fpu/multiarch/svml_s_asinf4_core_sse4.S   | 2649 ++++++++++++++++
 .../fpu/multiarch/svml_s_asinf8_core-sse.S    |   20 +
 .../x86_64/fpu/multiarch/svml_s_asinf8_core.c |   28 +
 .../fpu/multiarch/svml_s_asinf8_core_avx2.S   | 2483 +++++++++++++++
 sysdeps/x86_64/fpu/svml_d_asin2_core.S        |   29 +
 sysdeps/x86_64/fpu/svml_d_asin4_core.S        |   29 +
 sysdeps/x86_64/fpu/svml_d_asin4_core_avx.S    |   25 +
 sysdeps/x86_64/fpu/svml_d_asin8_core.S        |   25 +
 sysdeps/x86_64/fpu/svml_s_asinf16_core.S      |   25 +
 sysdeps/x86_64/fpu/svml_s_asinf4_core.S       |   29 +
 sysdeps/x86_64/fpu/svml_s_asinf8_core.S       |   29 +
 sysdeps/x86_64/fpu/svml_s_asinf8_core_avx.S   |   25 +
 .../x86_64/fpu/test-double-libmvec-asin-avx.c |    1 +
 .../fpu/test-double-libmvec-asin-avx2.c       |    1 +
 .../fpu/test-double-libmvec-asin-avx512f.c    |    1 +
 sysdeps/x86_64/fpu/test-double-libmvec-asin.c |    3 +
 .../x86_64/fpu/test-double-vlen2-wrappers.c   |    1 +
 .../fpu/test-double-vlen4-avx2-wrappers.c     |    1 +
 .../x86_64/fpu/test-double-vlen4-wrappers.c   |    1 +
 .../x86_64/fpu/test-double-vlen8-wrappers.c   |    1 +
 .../x86_64/fpu/test-float-libmvec-asinf-avx.c |    1 +
 .../fpu/test-float-libmvec-asinf-avx2.c       |    1 +
 .../fpu/test-float-libmvec-asinf-avx512f.c    |    1 +
 sysdeps/x86_64/fpu/test-float-libmvec-asinf.c |    3 +
 .../x86_64/fpu/test-float-vlen16-wrappers.c   |    1 +
 .../x86_64/fpu/test-float-vlen4-wrappers.c    |    1 +
 .../fpu/test-float-vlen8-avx2-wrappers.c      |    1 +
 .../x86_64/fpu/test-float-vlen8-wrappers.c    |    1 +
 49 files changed, 15808 insertions(+), 1 deletion(-)
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core-sse2.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core_sse4.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core-sse.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core-avx2.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core_avx512.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core-avx2.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core_avx512.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core-sse2.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core_sse4.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core-sse.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S
 create mode 100644 sysdeps/x86_64/fpu/svml_d_asin2_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_d_asin4_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_d_asin4_core_avx.S
 create mode 100644 sysdeps/x86_64/fpu/svml_d_asin8_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_s_asinf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_s_asinf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_s_asinf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/svml_s_asinf8_core_avx.S
 create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-asin-avx.c
 create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-asin-avx2.c
 create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-asin-avx512f.c
 create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-asin.c
 create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx.c
 create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx2.c
 create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx512f.c
 create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-asinf.c

Comments

Joseph Myers Nov. 24, 2021, 10:51 p.m. UTC | #1
On Wed, 24 Nov 2021, Sunil K Pandey via Libc-alpha wrote:

> Implement vectorized asin/asinf containing SSE, AVX, AVX2 and
> AVX512 versions for libmvec as per vector ABI.  It also contains
> accuracy and ABI tests for vector asin/asinf with regenerated ulps.

Here are some general comments that probably also apply to other patches 
in the series; you'll need to review all the other patches in the series 
for such issues.

>  sysdeps/x86/fpu/bits/math-vector.h            |    4 +

I'd expect corresponding changes to 
sysdeps/x86/fpu/finclude/math-vector-fortran.h so the functions can be 
used from Fortran code.

> +        cmpltpd   128+__svml_dasin_data_internal(%rip), %xmm0
> +        cvtps2pd  %xmm1, %xmm2
> +        movups    256+__svml_dasin_data_internal(%rip), %xmm6

Please see my comments from the review of the original libmvec addition 
regarding how to make the code and the tables of data it uses more 
readable 
<https://sourceware.org/legacy-ml/libc-alpha/2014-10/msg00324.html>.

We don't want hardcoded offsets into data tables, such as 128 or 256 here, 
in the function implementations, and we want the data tables to have 
meaningful names or comments on each part of the table saying what the 
semantics are.  That might mean defining lots of separate smaller tables, 
each with an appropriate name and comment describing its semantics, rather 
than just the one __svml_dasin_data_internal.  Or, if it's desirable in 
some cases to load the table address once and do everything else based on 
offsets from it, it might mean defining C macros (with meaningful names) 
for the various offsets, like those macros in svml_d_trig_data.h, and then 
defining the data using corresponding assembler macros to verify that the 
offsets for the data in the table actually match those in the C macros and 
cause a compile-time error if the C macros don't match the offsets.

> +        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
> +        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
> +        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xff, 0xff, 0xff, 0x22

Why do you have all these .cfi_escape in the .S sources?

If something needs to be represented in unwind info, it would be better to 
do it with more reader-friendly directives rather than .cfi_escape.  If 
such reader-friendly directives require a newer binutils version than the 
current minimum, what version do they require?  We could consider updating 
that minimum.

> +.LBL_1_3:

I don't think this sort of label name is very friendly.  At least, I'd 
suggest that each such label should have a comment explaining what the 
code is doing at that point, to help readers follow the flow of control in 
the function.

In general, it helps for long assembly sources (and these are certainly 
long) to be heavily commented to help readers follow what is happening 
where in the code.  While a comment per line of C code would be heavily 
excessive in C sources, having comments in assembly code per every few 
lines of equivalent C seems quite reasonable.  That means many more 
comments than there are in this patch at present.
Sunil Pandey Nov. 29, 2021, 8:56 p.m. UTC | #2
On Wed, Nov 24, 2021 at 2:52 PM Joseph Myers <joseph@codesourcery.com>
wrote:

> On Wed, 24 Nov 2021, Sunil K Pandey via Libc-alpha wrote:
>
> > Implement vectorized asin/asinf containing SSE, AVX, AVX2 and
> > AVX512 versions for libmvec as per vector ABI.  It also contains
> > accuracy and ABI tests for vector asin/asinf with regenerated ulps.
>
> Here are some general comments that probably also apply to other patches
> in the series; you'll need to review all the other patches in the series
> for such issues.
>
> >  sysdeps/x86/fpu/bits/math-vector.h            |    4 +
>
> I'd expect corresponding changes to
> sysdeps/x86/fpu/finclude/math-vector-fortran.h so the functions can be
> used from Fortran code.
>
> > +        cmpltpd   128+__svml_dasin_data_internal(%rip), %xmm0
> > +        cvtps2pd  %xmm1, %xmm2
> > +        movups    256+__svml_dasin_data_internal(%rip), %xmm6
>
> Please see my comments from the review of the original libmvec addition
> regarding how to make the code and the tables of data it uses more
> readable
> <https://sourceware.org/legacy-ml/libc-alpha/2014-10/msg00324.html>.
>
> We don't want hardcoded offsets into data tables, such as 128 or 256 here,
> in the function implementations, and we want the data tables to have
> meaningful names or comments on each part of the table saying what the
> semantics are.  That might mean defining lots of separate smaller tables,
> each with an appropriate name and comment describing its semantics, rather
> than just the one __svml_dasin_data_internal.  Or, if it's desirable in
> some cases to load the table address once and do everything else based on
> offsets from it, it might mean defining C macros (with meaningful names)
> for the various offsets, like those macros in svml_d_trig_data.h, and then
> defining the data using corresponding assembler macros to verify that the
> offsets for the data in the table actually match those in the C macros and
> cause a compile-time error if the C macros don't match the offsets.
>
> > +        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff,
> 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
> > +        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff,
> 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
> > +        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff,
> 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xff, 0xff, 0xff, 0x22
>
> Why do you have all these .cfi_escape in the .S sources?
>
> If something needs to be represented in unwind info, it would be better to
> do it with more reader-friendly directives rather than .cfi_escape.  If
> such reader-friendly directives require a newer binutils version than the
> current minimum, what version do they require?  We could consider updating
> that minimum.
>
> > +.LBL_1_3:
>
> I don't think this sort of label name is very friendly.  At least, I'd
> suggest that each such label should have a comment explaining what the
> code is doing at that point, to help readers follow the flow of control in
> the function.
>
> In general, it helps for long assembly sources (and these are certainly
> long) to be heavily commented to help readers follow what is happening
> where in the code.  While a comment per line of C code would be heavily
> excessive in C sources, having comments in assembly code per every few
> lines of equivalent C seems quite reasonable.  That means many more
> comments than there are in this patch at present.
>
> --
> Joseph S. Myers
> joseph@codesourcery.com


Thank you so much for your feedback.  I'm working on it to address in the
next version.

--Sunil
diff mbox series

Patch

diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h
index 7408044938..5628ada8e1 100644
--- a/bits/libm-simd-decl-stubs.h
+++ b/bits/libm-simd-decl-stubs.h
@@ -120,4 +120,15 @@ 
 #define __DECL_SIMD_acoshf32x
 #define __DECL_SIMD_acoshf64x
 #define __DECL_SIMD_acoshf128x
+
+#define __DECL_SIMD_asin
+#define __DECL_SIMD_asinf
+#define __DECL_SIMD_asinl
+#define __DECL_SIMD_asinf16
+#define __DECL_SIMD_asinf32
+#define __DECL_SIMD_asinf64
+#define __DECL_SIMD_asinf128
+#define __DECL_SIMD_asinf32x
+#define __DECL_SIMD_asinf64x
+#define __DECL_SIMD_asinf128x
 #endif
diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h
index 3380358eb8..dc04ab5538 100644
--- a/math/bits/mathcalls.h
+++ b/math/bits/mathcalls.h
@@ -52,7 +52,7 @@ 
 /* Arc cosine of X.  */
 __MATHCALL_VEC (acos,, (_Mdouble_ __x));
 /* Arc sine of X.  */
-__MATHCALL (asin,, (_Mdouble_ __x));
+__MATHCALL_VEC (asin,, (_Mdouble_ __x));
 /* Arc tangent of X.  */
 __MATHCALL (atan,, (_Mdouble_ __x));
 /* Arc tangent of Y/X.  */
diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
index dfc5cbc7dc..99229e1b1f 100644
--- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
+++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
@@ -48,17 +48,25 @@  GLIBC_2.22 _ZGVeN8vv_pow F
 GLIBC_2.22 _ZGVeN8vvv_sincos F
 GLIBC_2.35 _ZGVbN2v_acos F
 GLIBC_2.35 _ZGVbN2v_acosh F
+GLIBC_2.35 _ZGVbN2v_asin F
 GLIBC_2.35 _ZGVbN4v_acosf F
 GLIBC_2.35 _ZGVbN4v_acoshf F
+GLIBC_2.35 _ZGVbN4v_asinf F
 GLIBC_2.35 _ZGVcN4v_acos F
 GLIBC_2.35 _ZGVcN4v_acosh F
+GLIBC_2.35 _ZGVcN4v_asin F
 GLIBC_2.35 _ZGVcN8v_acosf F
 GLIBC_2.35 _ZGVcN8v_acoshf F
+GLIBC_2.35 _ZGVcN8v_asinf F
 GLIBC_2.35 _ZGVdN4v_acos F
 GLIBC_2.35 _ZGVdN4v_acosh F
+GLIBC_2.35 _ZGVdN4v_asin F
 GLIBC_2.35 _ZGVdN8v_acosf F
 GLIBC_2.35 _ZGVdN8v_acoshf F
+GLIBC_2.35 _ZGVdN8v_asinf F
 GLIBC_2.35 _ZGVeN16v_acosf F
 GLIBC_2.35 _ZGVeN16v_acoshf F
+GLIBC_2.35 _ZGVeN16v_asinf F
 GLIBC_2.35 _ZGVeN8v_acos F
 GLIBC_2.35 _ZGVeN8v_acosh F
+GLIBC_2.35 _ZGVeN8v_asin F
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h
index e7097a0a77..d1b3b566cd 100644
--- a/sysdeps/x86/fpu/bits/math-vector.h
+++ b/sysdeps/x86/fpu/bits/math-vector.h
@@ -66,6 +66,10 @@ 
 #  define __DECL_SIMD_acosh __DECL_SIMD_x86_64
 #  undef __DECL_SIMD_acoshf
 #  define __DECL_SIMD_acoshf __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_asin
+#  define __DECL_SIMD_asin __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_asinf
+#  define __DECL_SIMD_asinf __DECL_SIMD_x86_64
 
 # endif
 #endif
diff --git a/sysdeps/x86_64/fpu/Makeconfig b/sysdeps/x86_64/fpu/Makeconfig
index ed34708924..b190086619 100644
--- a/sysdeps/x86_64/fpu/Makeconfig
+++ b/sysdeps/x86_64/fpu/Makeconfig
@@ -24,6 +24,7 @@  postclean-generated += libmvec.mk
 libmvec-funcs = \
   acos \
   acosh \
+  asin \
   cos \
   exp \
   log \
diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions
index 053d32d14d..21d0c7937f 100644
--- a/sysdeps/x86_64/fpu/Versions
+++ b/sysdeps/x86_64/fpu/Versions
@@ -16,7 +16,9 @@  libmvec {
   GLIBC_2.35 {
     _ZGVbN2v_acos; _ZGVcN4v_acos; _ZGVdN4v_acos; _ZGVeN8v_acos;
     _ZGVbN2v_acosh; _ZGVcN4v_acosh; _ZGVdN4v_acosh; _ZGVeN8v_acosh;
+    _ZGVbN2v_asin; _ZGVcN4v_asin; _ZGVdN4v_asin; _ZGVeN8v_asin;
     _ZGVbN4v_acosf; _ZGVcN8v_acosf; _ZGVdN8v_acosf; _ZGVeN16v_acosf;
     _ZGVbN4v_acoshf; _ZGVcN8v_acoshf; _ZGVdN8v_acoshf; _ZGVeN16v_acoshf;
+    _ZGVbN4v_asinf; _ZGVcN8v_asinf; _ZGVdN8v_asinf; _ZGVeN16v_asinf;
   }
 }
diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps
index 8c8f4c648d..30ac87d84e 100644
--- a/sysdeps/x86_64/fpu/libm-test-ulps
+++ b/sysdeps/x86_64/fpu/libm-test-ulps
@@ -113,6 +113,26 @@  float: 1
 float128: 2
 ldouble: 1
 
+Function: "asin_vlen16":
+float: 1
+
+Function: "asin_vlen2":
+double: 1
+
+Function: "asin_vlen4":
+double: 1
+float: 1
+
+Function: "asin_vlen4_avx2":
+double: 1
+
+Function: "asin_vlen8":
+double: 1
+float: 1
+
+Function: "asin_vlen8_avx2":
+float: 1
+
 Function: "asinh":
 double: 2
 float: 2
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core-sse2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core-sse2.S
new file mode 100644
index 0000000000..57e1d41a7b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core-sse2.S
@@ -0,0 +1,20 @@ 
+/* SSE2 version of vectorized asin, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVbN2v_asin _ZGVbN2v_asin_sse2
+#include "../svml_d_asin2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core.c
new file mode 100644
index 0000000000..e46c3af81e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core.c
@@ -0,0 +1,27 @@ 
+/* Multiple versions of vectorized asin, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_asin
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_asin, __GI__ZGVbN2v_asin, __redirect__ZGVbN2v_asin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core_sse4.S
new file mode 100644
index 0000000000..8dbfd46b93
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin2_core_sse4.S
@@ -0,0 +1,2765 @@ 
+/* Function asin vectorized with SSE4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVbN2v_asin_sse4)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $256, %rsp
+        movups    %xmm8, 112(%rsp)
+        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        movups    __svml_dasin_data_internal(%rip), %xmm8
+        movups    64+__svml_dasin_data_internal(%rip), %xmm4
+        movups    %xmm15, 144(%rsp)
+        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xff, 0xff, 0xff, 0x22
+
+/* x = |arg| */
+        movaps    %xmm8, %xmm15
+        movups    %xmm14, 160(%rsp)
+        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        movaps    %xmm0, %xmm14
+        andps     %xmm14, %xmm15
+
+/* Y = 0.5 - 0.5*x */
+        movaps    %xmm4, %xmm7
+        mulpd     %xmm15, %xmm7
+        movaps    %xmm4, %xmm5
+        andnps    %xmm14, %xmm8
+        subpd     %xmm7, %xmm5
+
+/* S ~ -2*sqrt(Y) */
+        cvtpd2ps  %xmm5, %xmm3
+        movlhps   %xmm3, %xmm3
+        movaps    %xmm5, %xmm0
+        rsqrtps   %xmm3, %xmm1
+        cmpltpd   128+__svml_dasin_data_internal(%rip), %xmm0
+        cvtps2pd  %xmm1, %xmm2
+        movups    256+__svml_dasin_data_internal(%rip), %xmm6
+
+/* x^2 */
+        movaps    %xmm15, %xmm7
+        cmpltpd   %xmm15, %xmm6
+        mulpd     %xmm15, %xmm7
+        movmskpd  %xmm6, %edx
+        movaps    %xmm15, %xmm6
+        andnps    %xmm2, %xmm0
+        movups    448+__svml_dasin_data_internal(%rip), %xmm3
+        cmpnltpd  %xmm4, %xmm6
+        minpd     %xmm5, %xmm7
+        addpd     %xmm5, %xmm5
+        movaps    %xmm0, %xmm4
+        mulpd     %xmm0, %xmm4
+        mulpd     %xmm5, %xmm0
+        mulpd     %xmm4, %xmm5
+        subpd     384+__svml_dasin_data_internal(%rip), %xmm5
+        mulpd     %xmm5, %xmm3
+        addpd     464+__svml_dasin_data_internal(%rip), %xmm3
+        mulpd     %xmm5, %xmm3
+        addpd     480+__svml_dasin_data_internal(%rip), %xmm3
+        movaps    %xmm5, %xmm4
+        mulpd     %xmm3, %xmm5
+        mulpd     %xmm0, %xmm4
+        addpd     496+__svml_dasin_data_internal(%rip), %xmm5
+        mulpd     %xmm5, %xmm4
+
+/* polynomial */
+        movups    512+__svml_dasin_data_internal(%rip), %xmm5
+        movaps    %xmm7, %xmm3
+        mulpd     %xmm7, %xmm5
+        mulpd     %xmm7, %xmm3
+        addpd     528+__svml_dasin_data_internal(%rip), %xmm5
+        subpd     %xmm0, %xmm4
+        mulpd     %xmm3, %xmm5
+        movups    544+__svml_dasin_data_internal(%rip), %xmm2
+        andps     %xmm6, %xmm4
+        mulpd     %xmm7, %xmm2
+        movups    576+__svml_dasin_data_internal(%rip), %xmm0
+        mulpd     %xmm7, %xmm0
+        addpd     560+__svml_dasin_data_internal(%rip), %xmm2
+        addpd     592+__svml_dasin_data_internal(%rip), %xmm0
+        addpd     %xmm5, %xmm2
+        mulpd     %xmm3, %xmm0
+        movups    608+__svml_dasin_data_internal(%rip), %xmm1
+        movaps    %xmm3, %xmm5
+        mulpd     %xmm7, %xmm1
+        mulpd     %xmm3, %xmm5
+        addpd     624+__svml_dasin_data_internal(%rip), %xmm1
+        mulpd     %xmm5, %xmm2
+        addpd     %xmm0, %xmm1
+        movups    640+__svml_dasin_data_internal(%rip), %xmm0
+        mulpd     %xmm7, %xmm0
+        addpd     %xmm2, %xmm1
+        addpd     656+__svml_dasin_data_internal(%rip), %xmm0
+        mulpd     %xmm3, %xmm1
+        addpd     %xmm1, %xmm0
+        movups    672+__svml_dasin_data_internal(%rip), %xmm1
+        movaps    %xmm6, %xmm2
+        mulpd     %xmm7, %xmm1
+        mulpd     %xmm0, %xmm3
+        addpd     688+__svml_dasin_data_internal(%rip), %xmm1
+        addpd     %xmm3, %xmm1
+        mulpd     %xmm1, %xmm7
+        andnps    %xmm15, %xmm2
+        orps      %xmm4, %xmm2
+        mulpd     %xmm2, %xmm7
+        addpd     %xmm7, %xmm2
+        movups    704+__svml_dasin_data_internal(%rip), %xmm0
+        andps     %xmm6, %xmm0
+        addpd     %xmm2, %xmm0
+        pxor      %xmm8, %xmm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        movups    112(%rsp), %xmm8
+        cfi_restore(25)
+        movups    160(%rsp), %xmm14
+        cfi_restore(31)
+        movups    144(%rsp), %xmm15
+        cfi_restore(32)
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_3:
+        movups    %xmm14, 128(%rsp)
+        movups    %xmm0, 192(%rsp)
+        xorl      %eax, %eax
+        movups    %xmm9, 64(%rsp)
+        movups    %xmm10, 48(%rsp)
+        movups    %xmm11, 32(%rsp)
+        movups    %xmm12, 16(%rsp)
+        movups    %xmm13, (%rsp)
+        movq      %rsi, 88(%rsp)
+        movq      %rdi, 80(%rsp)
+        movq      %r12, 104(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1a, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1b, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x30, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x10, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x00, 0xff, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 96(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $2, %r12d
+        jl        .LBL_1_7
+        movups    64(%rsp), %xmm9
+        cfi_restore(26)
+        movups    48(%rsp), %xmm10
+        cfi_restore(27)
+        movups    32(%rsp), %xmm11
+        cfi_restore(28)
+        movups    16(%rsp), %xmm12
+        cfi_restore(29)
+        movups    (%rsp), %xmm13
+        cfi_restore(30)
+        movq      88(%rsp), %rsi
+        cfi_restore(4)
+        movq      80(%rsp), %rdi
+        cfi_restore(5)
+        movq      104(%rsp), %r12
+        cfi_restore(12)
+        movq      96(%rsp), %r13
+        cfi_restore(13)
+        movups    192(%rsp), %xmm0
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1a, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1b, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x30, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x10, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x00, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       128(%rsp,%r12,8), %rdi
+        lea       192(%rsp,%r12,8), %rsi
+        call      __svml_dasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVbN2v_asin_sse4)
+
+        .align    16,0x90
+
+__svml_dasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    6(%rdi), %edx
+        andl      $32752, %edx
+        cmpl      $32752, %edx
+        je        .LBL_2_12
+        movq      (%rdi), %rdx
+        movq      %rdx, -32(%rsp)
+        shrq      $56, %rdx
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        andl      $127, %edx
+        movb      %dl, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      7(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_73
+        movaps    %xmm1, %xmm6
+
+.LBL_73:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divsd     %xmm0, %xmm1
+        movsd     %xmm1, (%rsi)
+
+.LBL_2_11:
+        ret
+
+.LBL_2_12:
+        movsd     (%rdi), %xmm0
+        divsd     %xmm0, %xmm0
+        movsd     %xmm0, (%rsi)
+        testl     $1048575, 4(%rdi)
+        jne       .LBL_2_11
+        cmpl      $0, (%rdi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_dasin_cout_rare_internal,@function
+        .size	__svml_dasin_cout_rare_internal,.-__svml_dasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_dasin_data_internal:
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core-sse.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core-sse.S
new file mode 100644
index 0000000000..1006fddc59
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core-sse.S
@@ -0,0 +1,20 @@ 
+/* SSE version of vectorized asin, vector length is 4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVdN4v_asin _ZGVdN4v_asin_sse_wrapper
+#include "../svml_d_asin4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core.c
new file mode 100644
index 0000000000..b896516f5e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core.c
@@ -0,0 +1,27 @@ 
+/* Multiple versions of vectorized asin, vector length is 4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4v_asin
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_asin, __GI__ZGVdN4v_asin, __redirect__ZGVdN4v_asin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S
new file mode 100644
index 0000000000..08cf09101e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S
@@ -0,0 +1,2647 @@ 
+/* Function asin vectorized with AVX2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVdN4v_asin_avx2)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $384, %rsp
+        vmovups   %ymm8, 32(%rsp)
+        vmovupd   __svml_dasin_data_internal(%rip), %ymm6
+        .cfi_escape 0x10, 0xdb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xfe, 0xff, 0xff, 0x22
+        vmovupd   64+__svml_dasin_data_internal(%rip), %ymm8
+        vmovups   %ymm11, 192(%rsp)
+        vmovups   %ymm10, 160(%rsp)
+        vmovups   %ymm9, 96(%rsp)
+        vmovupd   256+__svml_dasin_data_internal(%rip), %ymm1
+        vmovups   %ymm12, 224(%rsp)
+        vmovups   %ymm13, 256(%rsp)
+        vmovups   %ymm14, 288(%rsp)
+        vmovups   %ymm15, 320(%rsp)
+        vmovapd   %ymm0, %ymm5
+
+/* x = |arg| */
+        vandpd    %ymm5, %ymm6, %ymm4
+        .cfi_escape 0x10, 0xdc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xde, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdf, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe0, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe1, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe2, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x22
+
+/* Y = 0.5 - 0.5*x */
+        vmovapd   %ymm8, %ymm11
+        vfnmadd231pd %ymm4, %ymm8, %ymm11
+
+/* x^2 */
+        vmulpd    %ymm4, %ymm4, %ymm7
+        vcmplt_oqpd %ymm4, %ymm1, %ymm0
+
+/* S ~ -2*sqrt(Y) */
+        vcmplt_oqpd 128+__svml_dasin_data_internal(%rip), %ymm11, %ymm9
+        vminpd    %ymm11, %ymm7, %ymm2
+        vaddpd    %ymm11, %ymm11, %ymm14
+        vcmpnlt_uqpd %ymm8, %ymm4, %ymm1
+        vcvtpd2ps %ymm11, %xmm7
+        vmovupd   768+__svml_dasin_data_internal(%rip), %ymm8
+        vmovupd   832+__svml_dasin_data_internal(%rip), %ymm11
+        vfmadd213pd 800+__svml_dasin_data_internal(%rip), %ymm2, %ymm8
+        vfmadd213pd 864+__svml_dasin_data_internal(%rip), %ymm2, %ymm11
+        vandnpd   %ymm5, %ymm6, %ymm3
+        vrsqrtps  %xmm7, %xmm6
+        vmovupd   640+__svml_dasin_data_internal(%rip), %ymm7
+        vcvtps2pd %xmm6, %ymm10
+        vfmadd213pd 672+__svml_dasin_data_internal(%rip), %ymm2, %ymm7
+        vandnpd   %ymm10, %ymm9, %ymm12
+        vmulpd    %ymm12, %ymm12, %ymm13
+        vmulpd    %ymm14, %ymm12, %ymm6
+        vmovupd   704+__svml_dasin_data_internal(%rip), %ymm10
+        vmulpd    %ymm2, %ymm2, %ymm12
+        vfmsub213pd 384+__svml_dasin_data_internal(%rip), %ymm13, %ymm14
+        vmovupd   896+__svml_dasin_data_internal(%rip), %ymm13
+        vfmadd213pd 736+__svml_dasin_data_internal(%rip), %ymm2, %ymm10
+        vmulpd    %ymm12, %ymm12, %ymm9
+        vmulpd    %ymm14, %ymm6, %ymm15
+        vfmadd213pd 928+__svml_dasin_data_internal(%rip), %ymm2, %ymm13
+        vfmadd213pd %ymm8, %ymm12, %ymm10
+        vmovmskpd %ymm0, %edx
+        vmovupd   448+__svml_dasin_data_internal(%rip), %ymm0
+        vfmadd213pd 480+__svml_dasin_data_internal(%rip), %ymm14, %ymm0
+        vfmadd213pd 512+__svml_dasin_data_internal(%rip), %ymm14, %ymm0
+        vfmadd213pd 544+__svml_dasin_data_internal(%rip), %ymm14, %ymm0
+
+/* polynomial */
+        vmovupd   576+__svml_dasin_data_internal(%rip), %ymm14
+        vfmsub213pd %ymm6, %ymm15, %ymm0
+        vfmadd213pd 608+__svml_dasin_data_internal(%rip), %ymm2, %ymm14
+        vblendvpd %ymm1, %ymm0, %ymm4, %ymm4
+        vfmadd213pd %ymm7, %ymm12, %ymm14
+        vfmadd213pd %ymm10, %ymm9, %ymm14
+        vfmadd213pd %ymm11, %ymm12, %ymm14
+        vfmadd213pd %ymm13, %ymm12, %ymm14
+        vmulpd    %ymm14, %ymm2, %ymm6
+        vfmadd213pd %ymm4, %ymm4, %ymm6
+        vandpd    960+__svml_dasin_data_internal(%rip), %ymm1, %ymm2
+        vaddpd    %ymm6, %ymm2, %ymm0
+        vxorpd    %ymm3, %ymm0, %ymm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        vmovups   32(%rsp), %ymm8
+        cfi_restore(91)
+        vmovups   96(%rsp), %ymm9
+        cfi_restore(92)
+        vmovups   160(%rsp), %ymm10
+        cfi_restore(93)
+        vmovups   192(%rsp), %ymm11
+        cfi_restore(94)
+        vmovups   224(%rsp), %ymm12
+        cfi_restore(95)
+        vmovups   256(%rsp), %ymm13
+        cfi_restore(96)
+        vmovups   288(%rsp), %ymm14
+        cfi_restore(97)
+        vmovups   320(%rsp), %ymm15
+        cfi_restore(98)
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        .cfi_escape 0x10, 0xdb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xde, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdf, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe0, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe1, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe2, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_3:
+        vmovupd   %ymm5, 64(%rsp)
+        vmovupd   %ymm0, 128(%rsp)
+        je        .LBL_1_2
+        xorl      %eax, %eax
+        vzeroupper
+        movq      %rsi, 8(%rsp)
+        movq      %rdi, (%rsp)
+        movq      %r12, 24(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x88, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x98, 0xfe, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 16(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xfe, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $4, %r12d
+        jl        .LBL_1_7
+        movq      8(%rsp), %rsi
+        cfi_restore(4)
+        movq      (%rsp), %rdi
+        cfi_restore(5)
+        movq      24(%rsp), %r12
+        cfi_restore(12)
+        movq      16(%rsp), %r13
+        cfi_restore(13)
+        vmovupd   128(%rsp), %ymm0
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x88, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x98, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xfe, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       64(%rsp,%r12,8), %rdi
+        lea       128(%rsp,%r12,8), %rsi
+        call      __svml_dasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVdN4v_asin_avx2)
+
+        .align    16,0x90
+
+__svml_dasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    6(%rdi), %edx
+        andl      $32752, %edx
+        cmpl      $32752, %edx
+        je        .LBL_2_12
+        movq      (%rdi), %rdx
+        movq      %rdx, -32(%rsp)
+        shrq      $56, %rdx
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        andl      $127, %edx
+        movb      %dl, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      7(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_73
+        movaps    %xmm1, %xmm6
+
+.LBL_73:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divsd     %xmm0, %xmm1
+        movsd     %xmm1, (%rsi)
+
+.LBL_2_11:
+        ret
+
+.LBL_2_12:
+        movsd     (%rdi), %xmm0
+        divsd     %xmm0, %xmm0
+        movsd     %xmm0, (%rsi)
+        testl     $1048575, 4(%rdi)
+        jne       .LBL_2_11
+        cmpl      $0, (%rdi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_dasin_cout_rare_internal,@function
+        .size	__svml_dasin_cout_rare_internal,.-__svml_dasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_dasin_data_internal:
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
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+        .type	_vmldASinHATab,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core-avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core-avx2.S
new file mode 100644
index 0000000000..354a55dfaa
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core-avx2.S
@@ -0,0 +1,20 @@ 
+/* AVX2 version of vectorized asin, vector length is 8.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVeN8v_asin _ZGVeN8v_asin_avx2_wrapper
+#include "../svml_d_asin8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core.c
new file mode 100644
index 0000000000..b03e4a2b9c
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core.c
@@ -0,0 +1,27 @@ 
+/* Multiple versions of vectorized asin, vector length is 8.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8v_asin
+#include "ifunc-mathvec-avx512-skx.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_asin, __GI__ZGVeN8v_asin, __redirect__ZGVeN8v_asin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core_avx512.S
new file mode 100644
index 0000000000..9b0968da36
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core_avx512.S
@@ -0,0 +1,2523 @@ 
+/* Function asin vectorized with AVX-512.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVeN8v_asin_skx)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $192, %rsp
+        vmovups   64+__svml_dasin_data_internal(%rip), %zmm8
+
+/* S ~ -2*sqrt(Y) */
+        vmovups   128+__svml_dasin_data_internal(%rip), %zmm10
+        vmovups   384+__svml_dasin_data_internal(%rip), %zmm14
+        vmovups   448+__svml_dasin_data_internal(%rip), %zmm15
+        vmovups   512+__svml_dasin_data_internal(%rip), %zmm2
+        vmovups   576+__svml_dasin_data_internal(%rip), %zmm1
+        vmovups   256+__svml_dasin_data_internal(%rip), %zmm9
+        vmovaps   %zmm0, %zmm6
+
+/* x = |arg| */
+        vandpd    __svml_dasin_data_internal(%rip), %zmm6, %zmm4
+
+/* Y = 0.5 - 0.5*x */
+        vmovaps   %zmm8, %zmm11
+        vfnmadd231pd {rn-sae}, %zmm4, %zmm8, %zmm11
+
+/* x^2 */
+        vmulpd    {rn-sae}, %zmm4, %zmm4, %zmm7
+        vrsqrt14pd %zmm11, %zmm12
+        vcmppd    $17, {sae}, %zmm10, %zmm11, %k1
+        vcmppd    $21, {sae}, %zmm8, %zmm4, %k2
+        vcmppd    $17, {sae}, %zmm4, %zmm9, %k0
+        vmovups   960+__svml_dasin_data_internal(%rip), %zmm10
+
+/* polynomial */
+        vmovups   704+__svml_dasin_data_internal(%rip), %zmm8
+        vmovups   832+__svml_dasin_data_internal(%rip), %zmm9
+        vminpd    {sae}, %zmm11, %zmm7, %zmm3
+        vxorpd    %zmm12, %zmm12, %zmm12{%k1}
+        vaddpd    {rn-sae}, %zmm11, %zmm11, %zmm0
+        vxorpd    %zmm6, %zmm4, %zmm5
+        vmulpd    {rn-sae}, %zmm12, %zmm12, %zmm13
+        vmulpd    {rn-sae}, %zmm12, %zmm0, %zmm7
+        vmovups   1088+__svml_dasin_data_internal(%rip), %zmm11
+        vmovups   896+__svml_dasin_data_internal(%rip), %zmm12
+        vfmsub213pd {rn-sae}, %zmm14, %zmm13, %zmm0
+        vmovups   640+__svml_dasin_data_internal(%rip), %zmm13
+        vfmadd231pd {rn-sae}, %zmm3, %zmm9, %zmm12
+        vmovups   1344+__svml_dasin_data_internal(%rip), %zmm9
+        vfmadd231pd {rn-sae}, %zmm0, %zmm15, %zmm2
+        vmovups   1216+__svml_dasin_data_internal(%rip), %zmm15
+        vmulpd    {rn-sae}, %zmm0, %zmm7, %zmm14
+        vfmadd213pd {rn-sae}, %zmm1, %zmm0, %zmm2
+        vmovups   768+__svml_dasin_data_internal(%rip), %zmm1
+        kmovw     %k0, %edx
+        vfmadd213pd {rn-sae}, %zmm13, %zmm0, %zmm2
+        vfmadd231pd {rn-sae}, %zmm3, %zmm8, %zmm1
+        vmovups   1280+__svml_dasin_data_internal(%rip), %zmm8
+        vmulpd    {rn-sae}, %zmm3, %zmm3, %zmm0
+        vfmsub213pd {rn-sae}, %zmm7, %zmm14, %zmm2
+        vmovups   1024+__svml_dasin_data_internal(%rip), %zmm7
+        vfmadd231pd {rn-sae}, %zmm3, %zmm15, %zmm8
+        vfmadd213pd {rn-sae}, %zmm12, %zmm0, %zmm1
+        vblendmpd %zmm2, %zmm4, %zmm2{%k2}
+        vfmadd231pd {rn-sae}, %zmm3, %zmm10, %zmm7
+        vmovups   1152+__svml_dasin_data_internal(%rip), %zmm10
+        vmovups   1472+__svml_dasin_data_internal(%rip), %zmm4
+        vfmadd231pd {rn-sae}, %zmm3, %zmm11, %zmm10
+        vmovups   1408+__svml_dasin_data_internal(%rip), %zmm11
+        vfmadd213pd {rn-sae}, %zmm10, %zmm0, %zmm7
+        vfmadd231pd {rn-sae}, %zmm3, %zmm9, %zmm11
+        vmulpd    {rn-sae}, %zmm0, %zmm0, %zmm10
+        vfmadd213pd {rn-sae}, %zmm7, %zmm10, %zmm1
+        vfmadd213pd {rn-sae}, %zmm8, %zmm0, %zmm1
+        vfmadd213pd {rn-sae}, %zmm11, %zmm0, %zmm1
+        vmulpd    {rn-sae}, %zmm3, %zmm1, %zmm3
+        vfmadd213pd {rn-sae}, %zmm2, %zmm2, %zmm3
+        vaddpd    {rn-sae}, %zmm4, %zmm3, %zmm3{%k2}
+        vxorpd    %zmm5, %zmm3, %zmm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+
+.LBL_1_3:
+        vmovups   %zmm6, 64(%rsp)
+        vmovups   %zmm0, 128(%rsp)
+        je        .LBL_1_2
+        xorl      %eax, %eax
+        vzeroupper
+        kmovw     %k4, 24(%rsp)
+        kmovw     %k5, 16(%rsp)
+        kmovw     %k6, 8(%rsp)
+        kmovw     %k7, (%rsp)
+        movq      %rsi, 40(%rsp)
+        movq      %rdi, 32(%rsp)
+        movq      %r12, 56(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x78, 0xff, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 48(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+        .cfi_escape 0x10, 0xfa, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $8, %r12d
+        jl        .LBL_1_7
+        kmovw     24(%rsp), %k4
+        cfi_restore(122)
+        kmovw     16(%rsp), %k5
+        cfi_restore(123)
+        kmovw     8(%rsp), %k6
+        cfi_restore(124)
+        kmovw     (%rsp), %k7
+        cfi_restore(125)
+        vmovups   128(%rsp), %zmm0
+        movq      40(%rsp), %rsi
+        cfi_restore(4)
+        movq      32(%rsp), %rdi
+        cfi_restore(5)
+        movq      56(%rsp), %r12
+        cfi_restore(12)
+        movq      48(%rsp), %r13
+        cfi_restore(13)
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x78, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfa, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       64(%rsp,%r12,8), %rdi
+        lea       128(%rsp,%r12,8), %rsi
+        call      __svml_dasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVeN8v_asin_skx)
+
+        .align    16,0x90
+
+__svml_dasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    6(%rdi), %edx
+        andl      $32752, %edx
+        cmpl      $32752, %edx
+        je        .LBL_2_12
+        movq      (%rdi), %rdx
+        movq      %rdx, -32(%rsp)
+        shrq      $56, %rdx
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        andl      $127, %edx
+        movb      %dl, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      7(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_54
+        movaps    %xmm1, %xmm6
+
+.LBL_54:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      7(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movq      -40(%rsp), %rcx
+        movq      %rcx, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divsd     %xmm0, %xmm1
+        movsd     %xmm1, (%rsi)
+
+.LBL_2_11:
+        ret
+
+.LBL_2_12:
+        movsd     (%rdi), %xmm0
+        divsd     %xmm0, %xmm0
+        movsd     %xmm0, (%rsi)
+        testl     $1048575, 4(%rdi)
+        jne       .LBL_2_11
+        cmpl      $0, (%rdi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_dasin_cout_rare_internal,@function
+        .size	__svml_dasin_cout_rare_internal,.-__svml_dasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_dasin_data_internal:
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	4294967295
+        .long	2147483647
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	1071644672
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	805306368
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	4294967040
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072693248
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	4227858432
+        .long	4294967295
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	0
+        .long	1073741824
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	2570790083
+        .long	3213983744
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	1869665325
+        .long	1067712512
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294966935
+        .long	3216506879
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	4294967197
+        .long	1070596095
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	3339630857
+        .long	1067480352
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	4158370029
+        .long	3213949719
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	3216784302
+        .long	1066680132
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	2513723093
+        .long	1064982579
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	721210070
+        .long	1065941212
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	3414736215
+        .long	1066167739
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	4114132270
+        .long	1066518236
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3957258973
+        .long	1066854556
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3778730174
+        .long	1067392114
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	3014936056
+        .long	1067899757
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	859300062
+        .long	1068708659
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1431655068
+        .long	1069897045
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	1413754136
+        .long	1073291771
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	856972295
+        .long	1016178214
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
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+        .long	3202035365
+        .long	2559814773
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+        .long	0
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+        .type	_vmldASinHATab,@object
+        .size	_vmldASinHATab,4504
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core-avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core-avx2.S
new file mode 100644
index 0000000000..e0582f27d4
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core-avx2.S
@@ -0,0 +1,20 @@ 
+/* AVX2 version of vectorized asinf.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVeN16v_asinf _ZGVeN16v_asinf_avx2_wrapper
+#include "../svml_s_asinf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core.c
new file mode 100644
index 0000000000..4435055566
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core.c
@@ -0,0 +1,28 @@ 
+/* Multiple versions of vectorized asinf, vector length is 16.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16v_asinf
+#include "ifunc-mathvec-avx512-skx.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_asinf, __GI__ZGVeN16v_asinf,
+	       __redirect__ZGVeN16v_asinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core_avx512.S
new file mode 100644
index 0000000000..20dea4c2e1
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core_avx512.S
@@ -0,0 +1,2173 @@ 
+/* Function asinf vectorized with AVX-512.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVeN16v_asinf_skx)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $192, %rsp
+        vmovups   __svml_sasin_data_internal(%rip), %zmm4
+        vmovups   64+__svml_sasin_data_internal(%rip), %zmm6
+
+/* SQ ~ -2*sqrt(Y) */
+        vmovups   192+__svml_sasin_data_internal(%rip), %zmm8
+        vmovups   448+__svml_sasin_data_internal(%rip), %zmm12
+        vmovups   512+__svml_sasin_data_internal(%rip), %zmm13
+        vmovups   256+__svml_sasin_data_internal(%rip), %zmm7
+        vmovaps   %zmm0, %zmm3
+
+/* x = |arg| */
+        vandps    %zmm3, %zmm4, %zmm2
+        vandnps   %zmm3, %zmm4, %zmm1
+
+/* x^2 */
+        vmulps    {rn-sae}, %zmm2, %zmm2, %zmm5
+        vcmpps    $17, {sae}, %zmm2, %zmm7, %k0
+        vcmpps    $21, {sae}, %zmm6, %zmm2, %k2
+        vmovups   704+__svml_sasin_data_internal(%rip), %zmm7
+        kmovw     %k0, %edx
+
+/* Y = 0.5 - 0.5*x */
+        vmovaps   %zmm6, %zmm9
+        vfnmadd231ps {rn-sae}, %zmm2, %zmm6, %zmm9
+        vmovups   896+__svml_sasin_data_internal(%rip), %zmm6
+        vrsqrt14ps %zmm9, %zmm10
+        vcmpps    $17, {sae}, %zmm8, %zmm9, %k1
+        vminps    {sae}, %zmm9, %zmm5, %zmm0
+        vmovups   576+__svml_sasin_data_internal(%rip), %zmm8
+        vmovups   832+__svml_sasin_data_internal(%rip), %zmm5
+        vxorps    %zmm10, %zmm10, %zmm10{%k1}
+        vaddps    {rn-sae}, %zmm9, %zmm9, %zmm14
+        vmulps    {rn-sae}, %zmm10, %zmm10, %zmm11
+        vmulps    {rn-sae}, %zmm10, %zmm14, %zmm4
+        vfmsub213ps {rn-sae}, %zmm12, %zmm11, %zmm14
+        vmulps    {rn-sae}, %zmm14, %zmm4, %zmm15
+        vfmadd231ps {rn-sae}, %zmm14, %zmm13, %zmm8
+        vmovups   768+__svml_sasin_data_internal(%rip), %zmm14
+
+/* polynomial */
+        vmovups   640+__svml_sasin_data_internal(%rip), %zmm13
+        vfmsub213ps {rn-sae}, %zmm4, %zmm15, %zmm8
+        vfmadd231ps {rn-sae}, %zmm0, %zmm14, %zmm5
+        vfmadd231ps {rn-sae}, %zmm0, %zmm13, %zmm7
+        vmulps    {rn-sae}, %zmm0, %zmm0, %zmm15
+        vblendmps %zmm8, %zmm2, %zmm2{%k2}
+        vfmadd213ps {rn-sae}, %zmm5, %zmm15, %zmm7
+        vfmadd213ps {rn-sae}, %zmm6, %zmm0, %zmm7
+        vmulps    {rn-sae}, %zmm0, %zmm7, %zmm9
+        vmovups   960+__svml_sasin_data_internal(%rip), %zmm0
+        vfmadd213ps {rn-sae}, %zmm2, %zmm2, %zmm9
+        vaddps    {rn-sae}, %zmm0, %zmm9, %zmm9{%k2}
+        vxorps    %zmm1, %zmm9, %zmm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+
+.LBL_1_3:
+        vmovups   %zmm3, 64(%rsp)
+        vmovups   %zmm0, 128(%rsp)
+        je        .LBL_1_2
+        xorl      %eax, %eax
+        vzeroupper
+        kmovw     %k4, 24(%rsp)
+        kmovw     %k5, 16(%rsp)
+        kmovw     %k6, 8(%rsp)
+        kmovw     %k7, (%rsp)
+        movq      %rsi, 40(%rsp)
+        movq      %rdi, 32(%rsp)
+        movq      %r12, 56(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x78, 0xff, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 48(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+        .cfi_escape 0x10, 0xfa, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $16, %r12d
+        jl        .LBL_1_7
+        kmovw     24(%rsp), %k4
+        cfi_restore(122)
+        kmovw     16(%rsp), %k5
+        cfi_restore(123)
+        kmovw     8(%rsp), %k6
+        cfi_restore(124)
+        kmovw     (%rsp), %k7
+        cfi_restore(125)
+        vmovups   128(%rsp), %zmm0
+        movq      40(%rsp), %rsi
+        cfi_restore(4)
+        movq      32(%rsp), %rdi
+        cfi_restore(5)
+        movq      56(%rsp), %r12
+        cfi_restore(12)
+        movq      48(%rsp), %r13
+        cfi_restore(13)
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x68, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x78, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x70, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfa, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x58, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xfd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       64(%rsp,%r12,4), %rdi
+        lea       128(%rsp,%r12,4), %rsi
+        call      __svml_sasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVeN16v_asinf_skx)
+
+        .align    16,0x90
+
+__svml_sasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    2(%rdi), %edx
+        andl      $32640, %edx
+        cmpl      $32640, %edx
+        je        .LBL_2_12
+        pxor      %xmm0, %xmm0
+        cvtss2sd  (%rdi), %xmm0
+        movsd     %xmm0, -32(%rsp)
+        andb      $127, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      3(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_54
+        movaps    %xmm1, %xmm6
+
+.LBL_54:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm3
+        cvtsd2ss  %xmm3, %xmm3
+        movss     %xmm3, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divss     %xmm0, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_12:
+        movss     (%rdi), %xmm0
+        divss     %xmm0, %xmm0
+        testl     $8388607, (%rdi)
+        movss     %xmm0, (%rsi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_sasin_cout_rare_internal,@function
+        .size	__svml_sasin_cout_rare_internal,.-__svml_sasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_sasin_data_internal:
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	1070141403
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	3007036718
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	0
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	2147483648
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	4290772992
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1036306094
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	1042839218
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .long	939876771
+        .type	__svml_sasin_data_internal,@object
+        .size	__svml_sasin_data_internal,1472
+        .align 32
+
+_vmldASinHATab:
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1072689152
+        .long	0
+        .long	1072685056
+        .long	0
+        .long	1072680960
+        .long	0
+        .long	1072676864
+        .long	0
+        .long	1072672768
+        .long	0
+        .long	1072668672
+        .long	0
+        .long	1072665600
+        .long	0
+        .long	1072661504
+        .long	0
+        .long	1072657408
+        .long	0
+        .long	1072653312
+        .long	0
+        .long	1072649216
+        .long	0
+        .long	1072646144
+        .long	0
+        .long	1072642048
+        .long	0
+        .long	1072637952
+        .long	0
+        .long	1072634880
+        .long	0
+        .long	1072630784
+        .long	0
+        .long	1072626688
+        .long	0
+        .long	1072623616
+        .long	0
+        .long	1072619520
+        .long	0
+        .long	1072615424
+        .long	0
+        .long	1072612352
+        .long	0
+        .long	1072608256
+        .long	0
+        .long	1072605184
+        .long	0
+        .long	1072601088
+        .long	0
+        .long	1072598016
+        .long	0
+        .long	1072593920
+        .long	0
+        .long	1072590848
+        .long	0
+        .long	1072586752
+        .long	0
+        .long	1072583680
+        .long	0
+        .long	1072580608
+        .long	0
+        .long	1072576512
+        .long	0
+        .long	1072573440
+        .long	0
+        .long	1072570368
+        .long	0
+        .long	1072566272
+        .long	0
+        .long	1072563200
+        .long	0
+        .long	1072560128
+        .long	0
+        .long	1072556032
+        .long	0
+        .long	1072552960
+        .long	0
+        .long	1072549888
+        .long	0
+        .long	1072546816
+        .long	0
+        .long	1072542720
+        .long	0
+        .long	1072539648
+        .long	0
+        .long	1072536576
+        .long	0
+        .long	1072533504
+        .long	0
+        .long	1072530432
+        .long	0
+        .long	1072527360
+        .long	0
+        .long	1072523264
+        .long	0
+        .long	1072520192
+        .long	0
+        .long	1072517120
+        .long	0
+        .long	1072514048
+        .long	0
+        .long	1072510976
+        .long	0
+        .long	1072507904
+        .long	0
+        .long	1072504832
+        .long	0
+        .long	1072501760
+        .long	0
+        .long	1072498688
+        .long	0
+        .long	1072495616
+        .long	0
+        .long	1072492544
+        .long	0
+        .long	1072489472
+        .long	0
+        .long	1072486400
+        .long	0
+        .long	1072483328
+        .long	0
+        .long	1072480256
+        .long	0
+        .long	1072478208
+        .long	0
+        .long	1072475136
+        .long	0
+        .long	1072472064
+        .long	0
+        .long	1072468992
+        .long	0
+        .long	1072465920
+        .long	0
+        .long	1072462848
+        .long	0
+        .long	1072459776
+        .long	0
+        .long	1072457728
+        .long	0
+        .long	1072454656
+        .long	0
+        .long	1072451584
+        .long	0
+        .long	1072448512
+        .long	0
+        .long	1072446464
+        .long	0
+        .long	1072443392
+        .long	0
+        .long	1072440320
+        .long	0
+        .long	1072437248
+        .long	0
+        .long	1072435200
+        .long	0
+        .long	1072432128
+        .long	0
+        .long	1072429056
+        .long	0
+        .long	1072427008
+        .long	0
+        .long	1072423936
+        .long	0
+        .long	1072420864
+        .long	0
+        .long	1072418816
+        .long	0
+        .long	1072415744
+        .long	0
+        .long	1072412672
+        .long	0
+        .long	1072410624
+        .long	0
+        .long	1072407552
+        .long	0
+        .long	1072405504
+        .long	0
+        .long	1072402432
+        .long	0
+        .long	1072400384
+        .long	0
+        .long	1072397312
+        .long	0
+        .long	1072395264
+        .long	0
+        .long	1072392192
+        .long	0
+        .long	1072390144
+        .long	0
+        .long	1072387072
+        .long	0
+        .long	1072385024
+        .long	0
+        .long	1072381952
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+        .long	3580333578
+        .long	1040816593
+        .long	3067382784
+        .long	1067899757
+        .long	3397590151
+        .long	1067392113
+        .long	2939529726
+        .long	1066854585
+        .long	1423429166
+        .long	1066517752
+        .long	1775218934
+        .long	1066178574
+        .long	1185392460
+        .long	1065859647
+        .long	289998670
+        .long	1065577550
+        .long	3179807072
+        .long	1065648121
+        .long	3781007284
+        .long	1061576176
+        .long	2482106687
+        .long	1067019199
+        .long	763519713
+        .long	3214591591
+        .long	3695107454
+        .long	1067530646
+        .long	0
+        .long	1073741824
+        .long	1124791109
+        .long	1006764147
+        .long	1476395008
+        .long	1069897045
+        .long	1953913876
+        .long	3189069141
+        .long	805306368
+        .long	1067660083
+        .long	165110192
+        .long	1039768033
+        .long	3067304082
+        .long	1065802605
+        .long	3404727379
+        .long	1064246385
+        .long	2737480376
+        .long	1062660281
+        .long	933797922
+        .long	1061274873
+        .long	1475716730
+        .long	1059887095
+        .long	1511619763
+        .long	1058519827
+        .long	556024211
+        .long	1057187555
+        .long	3482101045
+        .long	1056217350
+        .long	1174622859
+        .long	1050762633
+        .long	899668651
+        .long	1055506366
+        .long	1081094694
+        .long	3202035365
+        .long	2559814773
+        .long	1053906576
+        .long	0
+        .long	3219128320
+        .long	0
+        .long	1071120384
+        .long	0
+        .long	3218341888
+        .long	0
+        .long	1070694400
+        .long	0
+        .long	3218046976
+        .long	0
+        .long	1070391296
+        .long	0
+        .long	3217739776
+        .type	_vmldASinHATab,@object
+        .size	_vmldASinHATab,4504
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core-sse2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core-sse2.S
new file mode 100644
index 0000000000..b958db7795
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core-sse2.S
@@ -0,0 +1,20 @@ 
+/* SSE2 version of vectorized asinf, vector length is 4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVbN4v_asinf _ZGVbN4v_asinf_sse2
+#include "../svml_s_asinf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core.c
new file mode 100644
index 0000000000..5a7aa94264
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core.c
@@ -0,0 +1,28 @@ 
+/* Multiple versions of vectorized asinf, vector length is 4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4v_asinf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_asinf, __GI__ZGVbN4v_asinf,
+	       __redirect__ZGVbN4v_asinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core_sse4.S
new file mode 100644
index 0000000000..e59df80414
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf4_core_sse4.S
@@ -0,0 +1,2649 @@ 
+/* Function asinf vectorized with SSE4.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVbN4v_asinf_sse4)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $320, %rsp
+        movaps    %xmm0, %xmm7
+        movups    __svml_sasin_data_internal(%rip), %xmm5
+        movups    64+__svml_sasin_data_internal(%rip), %xmm3
+        movups    %xmm9, 144(%rsp)
+        .cfi_escape 0x10, 0x1a, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+
+/* x = |arg| */
+        movaps    %xmm5, %xmm9
+        andps     %xmm7, %xmm9
+
+/* Y = 0.5 - 0.5*x */
+        movaps    %xmm3, %xmm4
+        mulps     %xmm9, %xmm4
+        movaps    %xmm3, %xmm6
+        movups    256+__svml_sasin_data_internal(%rip), %xmm2
+        andnps    %xmm7, %xmm5
+        cmpltps   %xmm9, %xmm2
+        subps     %xmm4, %xmm6
+        movmskps  %xmm2, %edx
+        movaps    %xmm9, %xmm2
+
+/* SQ ~ -2*sqrt(Y) */
+        movaps    %xmm6, %xmm1
+
+/* x^2 */
+        movaps    %xmm9, %xmm4
+        cmpnltps  %xmm3, %xmm2
+        cmpltps   192+__svml_sasin_data_internal(%rip), %xmm1
+        rsqrtps   %xmm6, %xmm3
+        mulps     %xmm9, %xmm4
+        andnps    %xmm3, %xmm1
+        movaps    %xmm1, %xmm0
+        minps     %xmm6, %xmm4
+        mulps     %xmm1, %xmm0
+        addps     %xmm6, %xmm6
+        mulps     %xmm6, %xmm1
+        mulps     %xmm0, %xmm6
+        movups    512+__svml_sasin_data_internal(%rip), %xmm0
+        movups    608+__svml_sasin_data_internal(%rip), %xmm3
+        mulps     %xmm4, %xmm3
+        subps     448+__svml_sasin_data_internal(%rip), %xmm6
+        mulps     %xmm6, %xmm0
+        addps     624+__svml_sasin_data_internal(%rip), %xmm3
+        mulps     %xmm1, %xmm6
+        addps     528+__svml_sasin_data_internal(%rip), %xmm0
+        mulps     %xmm6, %xmm0
+
+/* polynomial */
+        movups    576+__svml_sasin_data_internal(%rip), %xmm6
+        subps     %xmm1, %xmm0
+        mulps     %xmm4, %xmm6
+        movaps    %xmm4, %xmm1
+        andps     %xmm2, %xmm0
+        mulps     %xmm4, %xmm1
+        addps     592+__svml_sasin_data_internal(%rip), %xmm6
+        mulps     %xmm1, %xmm6
+        movaps    %xmm2, %xmm1
+        andnps    %xmm9, %xmm1
+        addps     %xmm6, %xmm3
+        mulps     %xmm4, %xmm3
+        orps      %xmm0, %xmm1
+        movups    704+__svml_sasin_data_internal(%rip), %xmm0
+        andps     %xmm2, %xmm0
+        addps     640+__svml_sasin_data_internal(%rip), %xmm3
+        mulps     %xmm3, %xmm4
+        mulps     %xmm1, %xmm4
+        addps     %xmm4, %xmm1
+        addps     %xmm1, %xmm0
+        pxor      %xmm5, %xmm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        movups    144(%rsp), %xmm9
+        cfi_restore(26)
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        .cfi_escape 0x10, 0x1a, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_3:
+        movups    %xmm7, 192(%rsp)
+        movups    %xmm0, 256(%rsp)
+        xorl      %eax, %eax
+        movups    %xmm8, 96(%rsp)
+        movups    %xmm10, 80(%rsp)
+        movups    %xmm11, 64(%rsp)
+        movups    %xmm12, 48(%rsp)
+        movups    %xmm13, 32(%rsp)
+        movups    %xmm14, 16(%rsp)
+        movups    %xmm15, (%rsp)
+        movq      %rsi, 120(%rsp)
+        movq      %rdi, 112(%rsp)
+        movq      %r12, 136(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x38, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x30, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1b, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x10, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x00, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xf0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xd0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xfe, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 128(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $4, %r12d
+        jl        .LBL_1_7
+        movups    96(%rsp), %xmm8
+        cfi_restore(25)
+        movups    80(%rsp), %xmm10
+        cfi_restore(27)
+        movups    64(%rsp), %xmm11
+        cfi_restore(28)
+        movups    48(%rsp), %xmm12
+        cfi_restore(29)
+        movups    32(%rsp), %xmm13
+        cfi_restore(30)
+        movups    16(%rsp), %xmm14
+        cfi_restore(31)
+        movups    (%rsp), %xmm15
+        cfi_restore(32)
+        movq      120(%rsp), %rsi
+        cfi_restore(4)
+        movq      112(%rsp), %rdi
+        cfi_restore(5)
+        movq      136(%rsp), %r12
+        cfi_restore(12)
+        movq      128(%rsp), %r13
+        cfi_restore(13)
+        movups    256(%rsp), %xmm0
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x38, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x30, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x19, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1b, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x10, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x00, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xf0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x1f, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xd0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x20, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xfe, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       192(%rsp,%r12,4), %rdi
+        lea       256(%rsp,%r12,4), %rsi
+        call      __svml_sasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVbN4v_asinf_sse4)
+
+        .align    16,0x90
+
+__svml_sasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    2(%rdi), %edx
+        andl      $32640, %edx
+        cmpl      $32640, %edx
+        je        .LBL_2_12
+        pxor      %xmm0, %xmm0
+        cvtss2sd  (%rdi), %xmm0
+        movsd     %xmm0, -32(%rsp)
+        andb      $127, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      3(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_73
+        movaps    %xmm1, %xmm6
+
+.LBL_73:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm3
+        cvtsd2ss  %xmm3, %xmm3
+        movss     %xmm3, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divss     %xmm0, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_12:
+        movss     (%rdi), %xmm0
+        divss     %xmm0, %xmm0
+        testl     $8388607, (%rdi)
+        movss     %xmm0, (%rsi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_sasin_cout_rare_internal,@function
+        .size	__svml_sasin_cout_rare_internal,.-__svml_sasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_sasin_data_internal:
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core-sse.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core-sse.S
new file mode 100644
index 0000000000..6273c919d6
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core-sse.S
@@ -0,0 +1,20 @@ 
+/* SSE version of vectorized asinf, vector length is 8.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVdN8v_asinf _ZGVdN8v_asinf_sse_wrapper
+#include "../svml_s_asinf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core.c
new file mode 100644
index 0000000000..946b25b43f
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core.c
@@ -0,0 +1,28 @@ 
+/* Multiple versions of vectorized asinf, vector length is 8.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8v_asinf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_asinf, __GI__ZGVdN8v_asinf,
+	       __redirect__ZGVdN8v_asinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S
new file mode 100644
index 0000000000..3bb057b3a3
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S
@@ -0,0 +1,2483 @@ 
+/* Function asinf vectorized with AVX2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   https://www.gnu.org/licenses/.  */
+
+/*
+ * ALGORITHM DESCRIPTION:
+ *
+ *      SelMask = (|x| >= 0.5) ? 1 : 0;
+ *      R = SelMask ? sqrt(0.5 - 0.5*|x|) : |x|
+ *      asin(x) = (SelMask ? (Pi/2 - 2*Poly(R)) : Poly(R))*(-1)^sign(x)
+ *
+ *
+ */
+
+#include <sysdep.h>
+
+        .text
+ENTRY(_ZGVdN8v_asinf_avx2)
+        pushq     %rbp
+        cfi_def_cfa_offset(16)
+        movq      %rsp, %rbp
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        andq      $-64, %rsp
+        subq      $384, %rsp
+        vmovups   __svml_sasin_data_internal(%rip), %ymm5
+        vmovups   %ymm8, 256(%rsp)
+        .cfi_escape 0x10, 0xdb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xff, 0xff, 0xff, 0x22
+        vmovups   64+__svml_sasin_data_internal(%rip), %ymm8
+        vmovups   256+__svml_sasin_data_internal(%rip), %ymm6
+        vmovups   %ymm9, 32(%rsp)
+        vmovups   %ymm10, 96(%rsp)
+        vmovups   %ymm11, 160(%rsp)
+        vmovups   %ymm13, 224(%rsp)
+        vmovups   %ymm15, 320(%rsp)
+        vmovups   %ymm12, 192(%rsp)
+        .cfi_escape 0x10, 0xdc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xde, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdf, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe0, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe2, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x22
+        vmovups   640+__svml_sasin_data_internal(%rip), %ymm15
+        vmovups   %ymm14, 288(%rsp)
+        vmovaps   %ymm0, %ymm4
+
+/* x = |arg| */
+        vandps    %ymm4, %ymm5, %ymm3
+        vcmplt_oqps %ymm3, %ymm6, %ymm0
+
+/* x^2 */
+        vmulps    %ymm3, %ymm3, %ymm7
+
+/* Y = 0.5 - 0.5*x */
+        vmovaps   %ymm8, %ymm6
+        vfnmadd231ps %ymm3, %ymm8, %ymm6
+        vandnps   %ymm4, %ymm5, %ymm2
+
+/* SQ ~ -2*sqrt(Y) */
+        vrsqrtps  %ymm6, %ymm5
+        vminps    %ymm6, %ymm7, %ymm1
+        vcmplt_oqps 192+__svml_sasin_data_internal(%rip), %ymm6, %ymm7
+        .cfi_escape 0x10, 0xe1, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        vaddps    %ymm6, %ymm6, %ymm11
+        vfmadd213ps 672+__svml_sasin_data_internal(%rip), %ymm1, %ymm15
+        vmulps    %ymm1, %ymm1, %ymm14
+        vandnps   %ymm5, %ymm7, %ymm9
+        vmulps    %ymm9, %ymm9, %ymm10
+        vmulps    %ymm11, %ymm9, %ymm13
+        vmovups   512+__svml_sasin_data_internal(%rip), %ymm5
+        vfmsub213ps 448+__svml_sasin_data_internal(%rip), %ymm10, %ymm11
+        vfmadd213ps 544+__svml_sasin_data_internal(%rip), %ymm11, %ymm5
+        vmulps    %ymm11, %ymm13, %ymm12
+
+/* polynomial */
+        vmovups   576+__svml_sasin_data_internal(%rip), %ymm11
+        vfmsub213ps %ymm13, %ymm12, %ymm5
+        vfmadd213ps 608+__svml_sasin_data_internal(%rip), %ymm1, %ymm11
+        vfmadd213ps %ymm15, %ymm14, %ymm11
+        vfmadd213ps 704+__svml_sasin_data_internal(%rip), %ymm1, %ymm11
+        vmovmskps %ymm0, %edx
+        vcmpnlt_uqps %ymm8, %ymm3, %ymm0
+        vmulps    %ymm11, %ymm1, %ymm6
+        vblendvps %ymm0, %ymm5, %ymm3, %ymm3
+        vfmadd213ps %ymm3, %ymm3, %ymm6
+        vandps    768+__svml_sasin_data_internal(%rip), %ymm0, %ymm1
+        vaddps    %ymm6, %ymm1, %ymm0
+        vxorps    %ymm2, %ymm0, %ymm0
+        testl     %edx, %edx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        vmovups   256(%rsp), %ymm8
+        cfi_restore(91)
+        vmovups   32(%rsp), %ymm9
+        cfi_restore(92)
+        vmovups   96(%rsp), %ymm10
+        cfi_restore(93)
+        vmovups   160(%rsp), %ymm11
+        cfi_restore(94)
+        vmovups   192(%rsp), %ymm12
+        cfi_restore(95)
+        vmovups   224(%rsp), %ymm13
+        cfi_restore(96)
+        vmovups   288(%rsp), %ymm14
+        cfi_restore(97)
+        vmovups   320(%rsp), %ymm15
+        cfi_restore(98)
+        movq      %rbp, %rsp
+        popq      %rbp
+        cfi_def_cfa(7, 8)
+        cfi_restore(6)
+        ret
+        cfi_def_cfa(6, 16)
+        cfi_offset(6, -16)
+        .cfi_escape 0x10, 0xdb, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdc, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdd, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xe0, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xde, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x20, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xdf, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe0, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x60, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe1, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0xe2, 0x00, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x22
+
+.LBL_1_3:
+        vmovups   %ymm4, 64(%rsp)
+        vmovups   %ymm0, 128(%rsp)
+        je        .LBL_1_2
+        xorl      %eax, %eax
+        vzeroupper
+        movq      %rsi, 8(%rsp)
+        movq      %rdi, (%rsp)
+        movq      %r12, 24(%rsp)
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x88, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x98, 0xfe, 0xff, 0xff, 0x22
+        movl      %eax, %r12d
+        movq      %r13, 16(%rsp)
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xfe, 0xff, 0xff, 0x22
+        movl      %edx, %r13d
+
+.LBL_1_7:
+        btl       %r12d, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incl      %r12d
+        cmpl      $8, %r12d
+        jl        .LBL_1_7
+        movq      8(%rsp), %rsi
+        cfi_restore(4)
+        movq      (%rsp), %rdi
+        cfi_restore(5)
+        movq      24(%rsp), %r12
+        cfi_restore(12)
+        movq      16(%rsp), %r13
+        cfi_restore(13)
+        vmovups   128(%rsp), %ymm0
+        jmp       .LBL_1_2
+        .cfi_escape 0x10, 0x04, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x88, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x05, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x80, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x98, 0xfe, 0xff, 0xff, 0x22
+        .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x90, 0xfe, 0xff, 0xff, 0x22
+
+.LBL_1_10:
+        lea       64(%rsp,%r12,4), %rdi
+        lea       128(%rsp,%r12,4), %rsi
+        call      __svml_sasin_cout_rare_internal
+        jmp       .LBL_1_8
+
+END(_ZGVdN8v_asinf_avx2)
+
+        .align    16,0x90
+
+__svml_sasin_cout_rare_internal:
+
+        cfi_startproc
+
+        xorl      %eax, %eax
+        movzwl    2(%rdi), %edx
+        andl      $32640, %edx
+        cmpl      $32640, %edx
+        je        .LBL_2_12
+        pxor      %xmm0, %xmm0
+        cvtss2sd  (%rdi), %xmm0
+        movsd     %xmm0, -32(%rsp)
+        andb      $127, -25(%rsp)
+        movsd     -32(%rsp), %xmm12
+        movsd     4160+_vmldASinHATab(%rip), %xmm0
+        comisd    %xmm12, %xmm0
+        jb        .LBL_2_10
+        movsd     4168+_vmldASinHATab(%rip), %xmm1
+        comisd    %xmm12, %xmm1
+        jbe       .LBL_2_9
+        comisd    4136+_vmldASinHATab(%rip), %xmm12
+        jbe       .LBL_2_6
+        movsd     4104+_vmldASinHATab(%rip), %xmm13
+        movaps    %xmm12, %xmm5
+        mulsd     %xmm12, %xmm13
+        movaps    %xmm12, %xmm7
+        movsd     %xmm13, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     -32(%rsp), %xmm14
+        movsd     %xmm14, -56(%rsp)
+        movsd     -48(%rsp), %xmm8
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     4296+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm6, %xmm5
+        movsd     %xmm5, -56(%rsp)
+        movaps    %xmm12, %xmm5
+        movsd     -48(%rsp), %xmm9
+        movaps    %xmm9, %xmm13
+        addsd     %xmm9, %xmm7
+        mulsd     %xmm9, %xmm13
+        movsd     -56(%rsp), %xmm11
+        movaps    %xmm13, %xmm10
+        mulsd     %xmm11, %xmm7
+        mulsd     %xmm13, %xmm1
+        addsd     %xmm7, %xmm10
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm13, %xmm2
+        addsd     4288+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm0
+        addsd     4280+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm0, %xmm3
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm3, -48(%rsp)
+        movsd     -48(%rsp), %xmm4
+        addsd     4272+_vmldASinHATab(%rip), %xmm8
+        subsd     %xmm4, %xmm13
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        mulsd     %xmm6, %xmm9
+        addsd     4264+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm6, %xmm11
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm9, %xmm1
+        addsd     4256+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm10, %xmm8
+        movaps    %xmm9, %xmm3
+        movsd     -56(%rsp), %xmm14
+        movaps    %xmm6, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        addsd     %xmm14, %xmm7
+        addsd     4248+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm7, %xmm5
+        mulsd     %xmm10, %xmm8
+        addsd     %xmm5, %xmm11
+        addsd     4240+_vmldASinHATab(%rip), %xmm8
+        movsd     -48(%rsp), %xmm2
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm9, %xmm2
+        addsd     %xmm11, %xmm9
+        addsd     4232+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm9, %xmm7
+        mulsd     %xmm10, %xmm8
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        subsd     %xmm15, %xmm0
+        addsd     4224+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm0, -48(%rsp)
+        movsd     -48(%rsp), %xmm5
+        mulsd     %xmm10, %xmm8
+        subsd     %xmm5, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movsd     -56(%rsp), %xmm5
+        movaps    %xmm5, %xmm13
+        addsd     4216+_vmldASinHATab(%rip), %xmm8
+        mulsd     %xmm3, %xmm4
+        addsd     %xmm11, %xmm13
+        mulsd     %xmm10, %xmm8
+        mulsd     %xmm13, %xmm6
+        addsd     4208+_vmldASinHATab(%rip), %xmm8
+        addsd     %xmm7, %xmm6
+        mulsd     %xmm10, %xmm8
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm7
+        addsd     4200+_vmldASinHATab(%rip), %xmm8
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm1
+        movsd     4184+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm4, %xmm1
+        mulsd     %xmm9, %xmm10
+        addsd     %xmm6, %xmm4
+        movsd     %xmm1, -56(%rsp)
+        movaps    %xmm12, %xmm9
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     4176+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm2, %xmm0
+        mulsd     %xmm1, %xmm3
+        mulsd     %xmm1, %xmm11
+        mulsd     %xmm4, %xmm8
+        addsd     %xmm3, %xmm9
+        mulsd     %xmm1, %xmm5
+        addsd     %xmm11, %xmm10
+        movsd     %xmm0, -48(%rsp)
+        addsd     %xmm10, %xmm8
+        movsd     -48(%rsp), %xmm7
+        addsd     %xmm5, %xmm8
+        subsd     %xmm7, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm2
+        movsd     %xmm9, -48(%rsp)
+        addsd     %xmm2, %xmm6
+        movsd     -48(%rsp), %xmm11
+        movsd     4192+_vmldASinHATab(%rip), %xmm4
+        subsd     %xmm11, %xmm12
+        mulsd     %xmm4, %xmm0
+        mulsd     %xmm4, %xmm6
+        addsd     %xmm12, %xmm3
+        movsd     %xmm3, -56(%rsp)
+        movsd     -48(%rsp), %xmm3
+        movaps    %xmm3, %xmm12
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm0, %xmm12
+        addsd     %xmm7, %xmm8
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm12
+        subsd     %xmm12, %xmm3
+        addsd     %xmm3, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm9
+        movsd     -56(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        addsd     %xmm0, %xmm8
+        andb      $-128, %dil
+        addsd     %xmm8, %xmm9
+        addsd     %xmm9, %xmm6
+        movsd     %xmm6, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_6:
+        comisd    4128+_vmldASinHATab(%rip), %xmm12
+        jb        .LBL_2_8
+        addsd     %xmm0, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        mulsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        movb      3(%rdi), %dil
+        andb      $127, %dl
+        andb      $-128, %dil
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_8:
+        mulsd     %xmm12, %xmm12
+        movsd     %xmm12, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     -32(%rsp), %xmm0
+        movsd     %xmm0, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm1
+        cvtsd2ss  %xmm1, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_9:
+        movaps    %xmm0, %xmm9
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        pxor      %xmm15, %xmm15
+        andl      $-32753, %r9d
+        subsd     %xmm12, %xmm9
+        subsd     %xmm0, %xmm15
+        mulsd     %xmm9, %xmm1
+        movsd     %xmm1, -32(%rsp)
+        movzwl    -26(%rsp), %ecx
+        andl      $32752, %ecx
+        shrl      $4, %ecx
+        addl      $-1023, %ecx
+        movl      %ecx, %r8d
+        movl      %ecx, %edx
+        negl      %r8d
+        addl      $1023, %r8d
+        andl      $2047, %r8d
+        shll      $4, %r8d
+        movsd     %xmm0, -24(%rsp)
+        orl       %r8d, %r9d
+        movw      %r9w, -18(%rsp)
+        andl      $1, %edx
+        movsd     -24(%rsp), %xmm10
+        movl      %edx, %r10d
+        mulsd     %xmm10, %xmm1
+        lea       _vmldASinHATab(%rip), %r8
+        movaps    %xmm1, %xmm6
+        movsd     4112+_vmldASinHATab(%rip), %xmm7
+        addsd     %xmm1, %xmm6
+        jne       .LBL_73
+        movaps    %xmm1, %xmm6
+
+.LBL_73:
+        mulsd     %xmm6, %xmm7
+        movaps    %xmm6, %xmm8
+        movaps    %xmm7, %xmm11
+        subl      %edx, %ecx
+        movsd     4120+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm6, %xmm11
+        addsd     %xmm1, %xmm13
+        movsd     %xmm11, -56(%rsp)
+        movsd     -56(%rsp), %xmm12
+        movsd     %xmm13, -16(%rsp)
+        subsd     %xmm12, %xmm7
+        movl      -16(%rsp), %r11d
+        movaps    %xmm7, %xmm4
+        shll      $8, %r10d
+        andl      $511, %r11d
+        addl      %r10d, %r11d
+        subsd     %xmm7, %xmm8
+        movsd     (%r8,%r11,8), %xmm3
+        addsd     %xmm8, %xmm4
+        mulsd     %xmm3, %xmm7
+        movaps    %xmm3, %xmm14
+        mulsd     %xmm3, %xmm14
+        mulsd     %xmm14, %xmm4
+        movsd     4496+_vmldASinHATab(%rip), %xmm5
+        addsd     %xmm15, %xmm4
+        mulsd     %xmm4, %xmm5
+        shrl      $1, %ecx
+        addsd     4488+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        addl      $1023, %ecx
+        andl      $2047, %ecx
+        addsd     4480+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movzwl    4166+_vmldASinHATab(%rip), %r9d
+        shll      $4, %ecx
+        andl      $-32753, %r9d
+        movsd     %xmm0, -8(%rsp)
+        orl       %ecx, %r9d
+        movw      %r9w, -2(%rsp)
+        movsd     -8(%rsp), %xmm12
+        mulsd     %xmm12, %xmm7
+        addsd     4472+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     4104+_vmldASinHATab(%rip), %xmm1
+        mulsd     %xmm7, %xmm1
+        addsd     4464+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     4336+_vmldASinHATab(%rip), %xmm13
+        subsd     %xmm7, %xmm0
+        addsd     4456+_vmldASinHATab(%rip), %xmm5
+        addsd     4344+_vmldASinHATab(%rip), %xmm13
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm9, %xmm13
+        addsd     4448+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm4, %xmm5
+        mulsd     %xmm6, %xmm5
+        movsd     %xmm0, -56(%rsp)
+        addsd     %xmm5, %xmm8
+        movsd     4440+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm3, %xmm8
+        addsd     4432+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm12, %xmm8
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm2
+        movsd     4320+_vmldASinHATab(%rip), %xmm14
+        subsd     %xmm2, %xmm10
+        addsd     4424+_vmldASinHATab(%rip), %xmm5
+        addsd     4328+_vmldASinHATab(%rip), %xmm14
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm13, %xmm14
+        addsd     4416+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm14
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm10, -48(%rsp)
+        movaps    %xmm9, %xmm2
+        movsd     -48(%rsp), %xmm11
+        movsd     4104+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm11, %xmm7
+        mulsd     %xmm9, %xmm3
+        addsd     4408+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     4304+_vmldASinHATab(%rip), %xmm4
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm6
+        movsd     -56(%rsp), %xmm7
+        movsd     %xmm3, -48(%rsp)
+        addsd     %xmm7, %xmm8
+        addsd     4400+_vmldASinHATab(%rip), %xmm5
+        addsd     4312+_vmldASinHATab(%rip), %xmm4
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm14, %xmm4
+        addsd     4392+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     -48(%rsp), %xmm1
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm9, %xmm1
+        addsd     4384+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm1, -56(%rsp)
+        movsd     -48(%rsp), %xmm0
+        movsd     -56(%rsp), %xmm15
+        addsd     4376+_vmldASinHATab(%rip), %xmm5
+        subsd     %xmm15, %xmm0
+        mulsd     %xmm9, %xmm5
+        movsd     %xmm0, -48(%rsp)
+        movsd     4320+_vmldASinHATab(%rip), %xmm0
+        addsd     4368+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4360+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     4352+_vmldASinHATab(%rip), %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        mulsd     %xmm9, %xmm5
+        addsd     %xmm5, %xmm4
+        mulsd     %xmm4, %xmm8
+        movsd     -48(%rsp), %xmm4
+        subsd     %xmm4, %xmm2
+        movsd     %xmm2, -56(%rsp)
+        movsd     -48(%rsp), %xmm4
+        movaps    %xmm4, %xmm13
+        mulsd     %xmm4, %xmm13
+        mulsd     %xmm4, %xmm0
+        addsd     %xmm9, %xmm4
+        mulsd     %xmm13, %xmm7
+        movsd     -56(%rsp), %xmm3
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        mulsd     %xmm3, %xmm4
+        subsd     %xmm13, %xmm10
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm1
+        movsd     4304+_vmldASinHATab(%rip), %xmm10
+        subsd     %xmm1, %xmm11
+        movsd     %xmm11, -48(%rsp)
+        movaps    %xmm0, %xmm1
+        movsd     -48(%rsp), %xmm12
+        movsd     4304+_vmldASinHATab(%rip), %xmm11
+        subsd     %xmm12, %xmm13
+        movsd     %xmm13, -56(%rsp)
+        movsd     -48(%rsp), %xmm7
+        mulsd     4336+_vmldASinHATab(%rip), %xmm7
+        movsd     -56(%rsp), %xmm2
+        addsd     %xmm7, %xmm1
+        addsd     %xmm2, %xmm4
+        movsd     %xmm1, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        movsd     %xmm7, -16(%rsp)
+        subsd     %xmm14, %xmm0
+        mulsd     4336+_vmldASinHATab(%rip), %xmm4
+        addsd     %xmm0, %xmm7
+        movsd     %xmm7, -56(%rsp)
+        movsd     -48(%rsp), %xmm12
+        movsd     -56(%rsp), %xmm1
+        addsd     %xmm12, %xmm10
+        movsd     %xmm10, -48(%rsp)
+        movsd     -48(%rsp), %xmm15
+        movsd     4104+_vmldASinHATab(%rip), %xmm7
+        subsd     %xmm15, %xmm11
+        movsd     4320+_vmldASinHATab(%rip), %xmm2
+        addsd     %xmm11, %xmm12
+        mulsd     %xmm3, %xmm2
+        movsd     %xmm12, -56(%rsp)
+        movsd     -48(%rsp), %xmm15
+        mulsd     %xmm15, %xmm7
+        movsd     -56(%rsp), %xmm0
+        movsd     %xmm7, -48(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     4344+_vmldASinHATab(%rip), %xmm3
+        subsd     %xmm15, %xmm10
+        mulsd     %xmm9, %xmm3
+        movsd     %xmm10, -56(%rsp)
+        movsd     -48(%rsp), %xmm11
+        movsd     -56(%rsp), %xmm13
+        subsd     %xmm13, %xmm11
+        addsd     4328+_vmldASinHATab(%rip), %xmm3
+        movsd     %xmm11, -48(%rsp)
+        movsd     -48(%rsp), %xmm14
+        mulsd     %xmm9, %xmm3
+        subsd     %xmm14, %xmm15
+        movsd     %xmm15, -56(%rsp)
+        movsd     -48(%rsp), %xmm10
+        movsd     -56(%rsp), %xmm7
+        addsd     %xmm7, %xmm4
+        addsd     4312+_vmldASinHATab(%rip), %xmm3
+        addsd     %xmm2, %xmm4
+        addsd     %xmm5, %xmm3
+        addsd     %xmm1, %xmm4
+        addsd     %xmm0, %xmm4
+        movsd     4144+_vmldASinHATab(%rip), %xmm0
+        addsd     %xmm3, %xmm4
+        mulsd     %xmm6, %xmm4
+        mulsd     %xmm10, %xmm6
+        addsd     %xmm8, %xmm4
+        movaps    %xmm0, %xmm8
+        subsd     %xmm6, %xmm8
+        movsd     %xmm8, -48(%rsp)
+        movsd     -48(%rsp), %xmm9
+        subsd     %xmm9, %xmm0
+        subsd     %xmm6, %xmm0
+        movsd     %xmm0, -56(%rsp)
+        movsd     -48(%rsp), %xmm2
+        movsd     -56(%rsp), %xmm1
+        movb      3(%rdi), %dil
+        andb      $-128, %dil
+        addsd     4152+_vmldASinHATab(%rip), %xmm1
+        subsd     %xmm4, %xmm1
+        addsd     %xmm1, %xmm2
+        movsd     %xmm2, -40(%rsp)
+        movb      -33(%rsp), %dl
+        andb      $127, %dl
+        orb       %dil, %dl
+        movb      %dl, -33(%rsp)
+        movsd     -40(%rsp), %xmm3
+        cvtsd2ss  %xmm3, %xmm3
+        movss     %xmm3, (%rsi)
+        ret
+
+.LBL_2_10:
+        movl      $1, %eax
+        pxor      %xmm1, %xmm1
+        pxor      %xmm0, %xmm0
+        divss     %xmm0, %xmm1
+        movss     %xmm1, (%rsi)
+        ret
+
+.LBL_2_12:
+        movss     (%rdi), %xmm0
+        divss     %xmm0, %xmm0
+        testl     $8388607, (%rdi)
+        movss     %xmm0, (%rsi)
+        sete      %al
+        ret
+
+        cfi_endproc
+
+        .type	__svml_sasin_cout_rare_internal,@function
+        .size	__svml_sasin_cout_rare_internal,.-__svml_sasin_cout_rare_internal
+
+        .section .rodata, "a"
+        .align 64
+
+__svml_sasin_data_internal:
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .long	2147483647
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .long	1056964608
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .long	4294963200
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .long	796917760
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .long	1065353216
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .long	4294959104
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .long	4294965248
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .long	1073741824
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	3183476740
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1048576001
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1026481159
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1019423339
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1027250868
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1033468946
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .long	1042983679
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
+        .byte	0
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+        .long	1071900672
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+        .long	1071898624
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+        .long	1071896576
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+        .long	1071894528
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+        .long	1071873024
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+        .long	1071841280
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+        .long	1071833088
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+        .long	1071810560
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+        .long	0
+        .long	1071805440
+        .long	0
+        .long	1071803392
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+        .long	1071800320
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+        .long	1071718400
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+        .long	1071660032
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+        .long	1101004800
+        .long	1073741824
+        .long	1095761920
+        .long	256
+        .long	1118830592
+        .long	0
+        .long	1048576
+        .long	0
+        .long	1017118720
+        .long	1413754136
+        .long	1073291771
+        .long	856972295
+        .long	1016178214
+        .long	0
+        .long	1072693248
+        .long	0
+        .long	1071644672
+        .long	1476395008
+        .long	1069897045
+        .long	1768958041
+        .long	3189069141
+        .long	805306368
+        .long	1068708659
+        .long	3580333578
+        .long	1040816593
+        .long	3067382784
+        .long	1067899757
+        .long	3397590151
+        .long	1067392113
+        .long	2939529726
+        .long	1066854585
+        .long	1423429166
+        .long	1066517752
+        .long	1775218934
+        .long	1066178574
+        .long	1185392460
+        .long	1065859647
+        .long	289998670
+        .long	1065577550
+        .long	3179807072
+        .long	1065648121
+        .long	3781007284
+        .long	1061576176
+        .long	2482106687
+        .long	1067019199
+        .long	763519713
+        .long	3214591591
+        .long	3695107454
+        .long	1067530646
+        .long	0
+        .long	1073741824
+        .long	1124791109
+        .long	1006764147
+        .long	1476395008
+        .long	1069897045
+        .long	1953913876
+        .long	3189069141
+        .long	805306368
+        .long	1067660083
+        .long	165110192
+        .long	1039768033
+        .long	3067304082
+        .long	1065802605
+        .long	3404727379
+        .long	1064246385
+        .long	2737480376
+        .long	1062660281
+        .long	933797922
+        .long	1061274873
+        .long	1475716730
+        .long	1059887095
+        .long	1511619763
+        .long	1058519827
+        .long	556024211
+        .long	1057187555
+        .long	3482101045
+        .long	1056217350
+        .long	1174622859
+        .long	1050762633
+        .long	899668651
+        .long	1055506366
+        .long	1081094694
+        .long	3202035365
+        .long	2559814773
+        .long	1053906576
+        .long	0
+        .long	3219128320
+        .long	0
+        .long	1071120384
+        .long	0
+        .long	3218341888
+        .long	0
+        .long	1070694400
+        .long	0
+        .long	3218046976
+        .long	0
+        .long	1070391296
+        .long	0
+        .long	3217739776
+        .type	_vmldASinHATab,@object
+        .size	_vmldASinHATab,4504
diff --git a/sysdeps/x86_64/fpu/svml_d_asin2_core.S b/sysdeps/x86_64/fpu/svml_d_asin2_core.S
new file mode 100644
index 0000000000..8ff8bc58df
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_d_asin2_core.S
@@ -0,0 +1,29 @@ 
+/* Function asin vectorized with SSE2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_d_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVbN2v_asin)
+WRAPPER_IMPL_SSE2 asin
+END (_ZGVbN2v_asin)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVbN2v_asin)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_d_asin4_core.S b/sysdeps/x86_64/fpu/svml_d_asin4_core.S
new file mode 100644
index 0000000000..dbe33952bc
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_d_asin4_core.S
@@ -0,0 +1,29 @@ 
+/* Function asin vectorized with AVX2, wrapper version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_d_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVdN4v_asin)
+WRAPPER_IMPL_AVX _ZGVbN2v_asin
+END (_ZGVdN4v_asin)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVdN4v_asin)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_d_asin4_core_avx.S b/sysdeps/x86_64/fpu/svml_d_asin4_core_avx.S
new file mode 100644
index 0000000000..513a31bde5
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_d_asin4_core_avx.S
@@ -0,0 +1,25 @@ 
+/* Function asin vectorized in AVX ISA as wrapper to SSE4 ISA version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_d_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVcN4v_asin)
+WRAPPER_IMPL_AVX _ZGVbN2v_asin
+END (_ZGVcN4v_asin)
diff --git a/sysdeps/x86_64/fpu/svml_d_asin8_core.S b/sysdeps/x86_64/fpu/svml_d_asin8_core.S
new file mode 100644
index 0000000000..06694298cf
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_d_asin8_core.S
@@ -0,0 +1,25 @@ 
+/* Function asin vectorized with AVX-512, wrapper to AVX2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_d_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVeN8v_asin)
+WRAPPER_IMPL_AVX512 _ZGVdN4v_asin
+END (_ZGVeN8v_asin)
diff --git a/sysdeps/x86_64/fpu/svml_s_asinf16_core.S b/sysdeps/x86_64/fpu/svml_s_asinf16_core.S
new file mode 100644
index 0000000000..015d583e3f
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_asinf16_core.S
@@ -0,0 +1,25 @@ 
+/* Function asinf vectorized with AVX-512. Wrapper to AVX2 version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVeN16v_asinf)
+WRAPPER_IMPL_AVX512 _ZGVdN8v_asinf
+END (_ZGVeN16v_asinf)
diff --git a/sysdeps/x86_64/fpu/svml_s_asinf4_core.S b/sysdeps/x86_64/fpu/svml_s_asinf4_core.S
new file mode 100644
index 0000000000..d80f06c16d
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_asinf4_core.S
@@ -0,0 +1,29 @@ 
+/* Function asinf vectorized with SSE2, wrapper version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVbN4v_asinf)
+WRAPPER_IMPL_SSE2 asinf
+END (_ZGVbN4v_asinf)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVbN4v_asinf)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_s_asinf8_core.S b/sysdeps/x86_64/fpu/svml_s_asinf8_core.S
new file mode 100644
index 0000000000..304ad0a7f5
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_asinf8_core.S
@@ -0,0 +1,29 @@ 
+/* Function asinf vectorized with AVX2, wrapper version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVdN8v_asinf)
+WRAPPER_IMPL_AVX _ZGVbN4v_asinf
+END (_ZGVdN8v_asinf)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVdN8v_asinf)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_s_asinf8_core_avx.S b/sysdeps/x86_64/fpu/svml_s_asinf8_core_avx.S
new file mode 100644
index 0000000000..a2f7dc112e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_asinf8_core_avx.S
@@ -0,0 +1,25 @@ 
+/* Function asinf vectorized in AVX ISA as wrapper to SSE4 ISA version.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+        .text
+ENTRY (_ZGVcN8v_asinf)
+WRAPPER_IMPL_AVX _ZGVbN4v_asinf
+END (_ZGVcN8v_asinf)
diff --git a/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx.c b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx.c
new file mode 100644
index 0000000000..e37cfdce58
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx.c
@@ -0,0 +1 @@ 
+#include "test-double-libmvec-asin.c"
diff --git a/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx2.c b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx2.c
new file mode 100644
index 0000000000..e37cfdce58
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx2.c
@@ -0,0 +1 @@ 
+#include "test-double-libmvec-asin.c"
diff --git a/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx512f.c b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx512f.c
new file mode 100644
index 0000000000..e37cfdce58
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-double-libmvec-asin-avx512f.c
@@ -0,0 +1 @@ 
+#include "test-double-libmvec-asin.c"
diff --git a/sysdeps/x86_64/fpu/test-double-libmvec-asin.c b/sysdeps/x86_64/fpu/test-double-libmvec-asin.c
new file mode 100644
index 0000000000..d2e16e67f4
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-double-libmvec-asin.c
@@ -0,0 +1,3 @@ 
+#define LIBMVEC_TYPE double
+#define LIBMVEC_FUNC asin
+#include "test-vector-abi-arg1.h"
diff --git a/sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c b/sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c
index 3a6b956116..c1b251c84e 100644
--- a/sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (exp), _ZGVbN2v_exp)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (pow), _ZGVbN2vv_pow)
 VECTOR_WRAPPER (WRAPPER_NAME (acos), _ZGVbN2v_acos)
 VECTOR_WRAPPER (WRAPPER_NAME (acosh), _ZGVbN2v_acosh)
+VECTOR_WRAPPER (WRAPPER_NAME (asin), _ZGVbN2v_asin)
 
 #define VEC_INT_TYPE __m128i
 
diff --git a/sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c b/sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c
index 55dd89aa4d..4083423061 100644
--- a/sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c
@@ -32,6 +32,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (exp), _ZGVdN4v_exp)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (pow), _ZGVdN4vv_pow)
 VECTOR_WRAPPER (WRAPPER_NAME (acos), _ZGVdN4v_acos)
 VECTOR_WRAPPER (WRAPPER_NAME (acosh), _ZGVdN4v_acosh)
+VECTOR_WRAPPER (WRAPPER_NAME (asin), _ZGVdN4v_asin)
 
 #ifndef __ILP32__
 # define VEC_INT_TYPE __m256i
diff --git a/sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c b/sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c
index 93a05f8eac..e3c6fea5b8 100644
--- a/sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (exp), _ZGVcN4v_exp)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (pow), _ZGVcN4vv_pow)
 VECTOR_WRAPPER (WRAPPER_NAME (acos), _ZGVcN4v_acos)
 VECTOR_WRAPPER (WRAPPER_NAME (acosh), _ZGVcN4v_acosh)
+VECTOR_WRAPPER (WRAPPER_NAME (asin), _ZGVcN4v_asin)
 
 #define VEC_INT_TYPE __m128i
 
diff --git a/sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c b/sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c
index 284fc75888..f6b6934b92 100644
--- a/sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (exp), _ZGVeN8v_exp)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (pow), _ZGVeN8vv_pow)
 VECTOR_WRAPPER (WRAPPER_NAME (acos), _ZGVeN8v_acos)
 VECTOR_WRAPPER (WRAPPER_NAME (acosh), _ZGVeN8v_acosh)
+VECTOR_WRAPPER (WRAPPER_NAME (asin), _ZGVeN8v_asin)
 
 #ifndef __ILP32__
 # define VEC_INT_TYPE __m512i
diff --git a/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx.c b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx.c
new file mode 100644
index 0000000000..6aa8f5f370
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx.c
@@ -0,0 +1 @@ 
+#include "test-float-libmvec-asinf.c"
diff --git a/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx2.c b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx2.c
new file mode 100644
index 0000000000..6aa8f5f370
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx2.c
@@ -0,0 +1 @@ 
+#include "test-float-libmvec-asinf.c"
diff --git a/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx512f.c b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx512f.c
new file mode 100644
index 0000000000..6aa8f5f370
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-float-libmvec-asinf-avx512f.c
@@ -0,0 +1 @@ 
+#include "test-float-libmvec-asinf.c"
diff --git a/sysdeps/x86_64/fpu/test-float-libmvec-asinf.c b/sysdeps/x86_64/fpu/test-float-libmvec-asinf.c
new file mode 100644
index 0000000000..2bbe2395a0
--- /dev/null
+++ b/sysdeps/x86_64/fpu/test-float-libmvec-asinf.c
@@ -0,0 +1,3 @@ 
+#define LIBMVEC_TYPE float
+#define LIBMVEC_FUNC asinf
+#include "test-vector-abi-arg1.h"
diff --git a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
index 69c45f82a4..63221da5ac 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVeN16v_expf)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVeN16vv_powf)
 VECTOR_WRAPPER (WRAPPER_NAME (acosf), _ZGVeN16v_acosf)
 VECTOR_WRAPPER (WRAPPER_NAME (acoshf), _ZGVeN16v_acoshf)
+VECTOR_WRAPPER (WRAPPER_NAME (asinf), _ZGVeN16v_asinf)
 
 #define VEC_INT_TYPE __m512i
 
diff --git a/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
index 05296b1c06..d82b2e1556 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVbN4v_expf)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVbN4vv_powf)
 VECTOR_WRAPPER (WRAPPER_NAME (acosf), _ZGVbN4v_acosf)
 VECTOR_WRAPPER (WRAPPER_NAME (acoshf), _ZGVbN4v_acoshf)
+VECTOR_WRAPPER (WRAPPER_NAME (asinf), _ZGVbN4v_asinf)
 
 #define VEC_INT_TYPE __m128i
 
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
index 13b9aba8d9..fb35f7aa65 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
@@ -32,6 +32,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVdN8v_expf)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVdN8vv_powf)
 VECTOR_WRAPPER (WRAPPER_NAME (acosf), _ZGVdN8v_acosf)
 VECTOR_WRAPPER (WRAPPER_NAME (acoshf), _ZGVdN8v_acoshf)
+VECTOR_WRAPPER (WRAPPER_NAME (asinf), _ZGVdN8v_asinf)
 
 /* Redefinition of wrapper to be compatible with _ZGVdN8vvv_sincosf.  */
 #undef VECTOR_WRAPPER_fFF
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
index 274b742448..171d92d0b1 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
@@ -29,6 +29,7 @@  VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVcN8v_expf)
 VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVcN8vv_powf)
 VECTOR_WRAPPER (WRAPPER_NAME (acosf), _ZGVcN8v_acosf)
 VECTOR_WRAPPER (WRAPPER_NAME (acoshf), _ZGVcN8v_acoshf)
+VECTOR_WRAPPER (WRAPPER_NAME (asinf), _ZGVcN8v_asinf)
 
 #define VEC_INT_TYPE __m128i