aarch64: Optimized implementation of pthread_spin_trylock

Message ID 20191028133930.24004-1-zhangxuelei4@huawei.com
State Rejected
Headers

Commit Message

Xuelei Zhang Oct. 28, 2019, 1:39 p.m. UTC
  Judge the value of ldaxr before stxr, to reduce the memmory store
operation in the case spin_lock is already used by other threads.
---
 sysdeps/aarch64/nptl/pthread_spin_trylock.S | 46 +++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 sysdeps/aarch64/nptl/pthread_spin_trylock.S
  

Comments

Andrew Pinski Oct. 28, 2019, 5:49 p.m. UTC | #1
On Mon, Oct 28, 2019 at 6:39 AM Xuelei Zhang <zhangxuelei4@huawei.com> wrote:
>
> Judge the value of ldaxr before stxr, to reduce the memmory store
> operation in the case spin_lock is already used by other threads.

The generic pthread_spin_trylock already has support for doing CAS
rather than using SWP.
Why not add an extra macro and expand the comment there on why
sometimes using CAS is better than using SWP.

Thanks,
Andrew Pinski


> ---
>  sysdeps/aarch64/nptl/pthread_spin_trylock.S | 46 +++++++++++++++++++++++++++++
>  1 file changed, 46 insertions(+)
>  create mode 100644 sysdeps/aarch64/nptl/pthread_spin_trylock.S
>
> diff --git a/sysdeps/aarch64/nptl/pthread_spin_trylock.S b/sysdeps/aarch64/nptl/pthread_spin_trylock.S
> new file mode 100644
> index 00000000000..408861dd9f7
> --- /dev/null
> +++ b/sysdeps/aarch64/nptl/pthread_spin_trylock.S
> @@ -0,0 +1,46 @@
> +/* pthread_spin_trylock -- trylock a spin lock. Generic version.
> +   Copyright (C) 2012-2019 Free Software Foundation, Inc.
> +   This file is part of the GNU C Library.
> +
> +   The GNU C Library is free software; you can redistribute it and/or
> +   modify it under the terms of the GNU Lesser General Public
> +   License as published by the Free Software Foundation; either
> +   version 2.1 of the License, or (at your option) any later version.
> +
> +   The GNU C Library is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   Lesser General Public License for more details.
> +
> +   You should have received a copy of the GNU Lesser General Public
> +   License along with the GNU C Library.  If not, see
> +   <https://www.gnu.org/licenses/>.  */
> +
> +#include <sysdep.h>
> +
> +/* Assumptions:
> + *
> + * ARMv8-a, AArch64
> + */
> +
> +ENTRY (pthread_spin_trylock)
> +       DELOUSE (0)
> +       mov w1, #0x1
> +
> +L(spin):
> +       ldaxr   w2, [x0]
> +       cbnz    w2, L(fail)
> +       stxr    w3, w1, [x0]
> +       cbnz    w3, L(spin)
> +       mov w0, #0
> +       ret
> +       nop
> +
> +L(fail):
> +       mov     w0, #16
> +       ret
> +
> +END (pthread_spin_trylock)
> +libc_hidden_builtin_def (pthread_spin_trylock)
> +weak_alias (pthread_spin_trylock, index)
> +
> --
> 2.14.1.windows.1
>
>
  

Patch

diff --git a/sysdeps/aarch64/nptl/pthread_spin_trylock.S b/sysdeps/aarch64/nptl/pthread_spin_trylock.S
new file mode 100644
index 00000000000..408861dd9f7
--- /dev/null
+++ b/sysdeps/aarch64/nptl/pthread_spin_trylock.S
@@ -0,0 +1,46 @@ 
+/* pthread_spin_trylock -- trylock a spin lock. Generic version.
+   Copyright (C) 2012-2019 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* Assumptions:
+ *
+ * ARMv8-a, AArch64
+ */
+
+ENTRY (pthread_spin_trylock)
+	DELOUSE (0)
+	mov w1, #0x1
+	
+L(spin):
+	ldaxr   w2, [x0]
+	cbnz    w2, L(fail)
+	stxr    w3, w1, [x0]
+	cbnz    w3, L(spin)
+	mov w0, #0
+	ret
+	nop
+
+L(fail):
+	mov	w0, #16
+	ret
+
+END (pthread_spin_trylock)
+libc_hidden_builtin_def (pthread_spin_trylock)
+weak_alias (pthread_spin_trylock, index)
+