From patchwork Thu Mar 23 17:25:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 19716 Received: (qmail 78154 invoked by alias); 23 Mar 2017 17:25:29 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 78142 invoked by uid 89); 23 Mar 2017 17:25:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Reply-To: pc@us.ibm.com To: libc-alpha@sourceware.org From: Paul Clarke Subject: [PATCH v2] Support auxilliary vector components for cache geometries. Date: Thu, 23 Mar 2017 12:25:22 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17032317-0004-0000-0000-000011D4E128 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006835; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000206; SDB=6.00837876; UDB=6.00411957; IPR=6.00615639; BA=6.00005234; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00014779; XFM=3.00000013; UTC=2017-03-23 17:25:24 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17032317-0005-0000-0000-00007E0C60D0 Message-Id: <0882a490-f124-3312-9d30-6ef379afac7e@us.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-23_15:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703230151 Add support to getauxval() for new types to get L1, L2, L3 cache sizes, cache line sizes, and cache associativities. The new types for getauxval() were added in the stream for Linux kernel v4.11 in commit 98a5f361b8625c6f4841d6ba013bbf0e80d08147. * elf/elf.h: Add auxvec identifiers from kernel arch/powerpc/include/uapi/asm/auxvec.h. --- v2: removed test case elf/elf.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/elf/elf.h b/elf/elf.h index 6d3b356..fff893d 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -1170,6 +1170,18 @@ typedef struct #define AT_L2_CACHESHAPE 36 #define AT_L3_CACHESHAPE 37 +/* Shapes of the caches, with more room to describe them. + *GEOMETRY are comprised of cache line size in bytes in the bottom 16 bits + and the cache associativity in the next 16 bits. */ +#define AT_L1I_CACHESIZE 40 +#define AT_L1I_CACHEGEOMETRY 41 +#define AT_L1D_CACHESIZE 42 +#define AT_L1D_CACHEGEOMETRY 43 +#define AT_L2_CACHESIZE 44 +#define AT_L2_CACHEGEOMETRY 45 +#define AT_L3_CACHESIZE 46 +#define AT_L3_CACHEGEOMETRY 47 + /* Note section contents. Each entry in the note section begins with a header of a fixed form. */