diff mbox series

[v3,19/19] Add RISC-V 32-bit target to build-many-glibcs.py

Message ID	0189f629b149cc35b201bee51b70d407a2e23fb5.1594568655.git.alistair.francis@wdc.com
State	Committed
Headers	DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 03A6F3851C13 IronPort-SDR: 4jXLwX0Bm0EnZ/uee+YjgsXD61eN02+TLHntgJ+8OTbf8rTtpEU7urnkplDTidBmAL2DkXVEI/ ff54cwGNStGiiodfZ4+KrCmtsTlDjQTFPV3dJ253axUuMla8kSfwYZI99tpUjDh1ep2sYEQsKK DdpfvSIV8VO/maqBi8kqpaxY6k5PjqQ+0xFcN2D+Hb83+S83pNy5HlRq/F6OEchK9sGEMc1RMg 13lwzJmnZSLQmJ4TnilwvLwkR4g2rxZq3U+q/ROHS12y375S4pGyMhV33OkQ6aU/r6zTmBHshG vkw= IronPort-SDR: DuZWKCFEF4ylqNtgS4HxGzevp6Vdx0yNMqnsAiuAUq1wwHaD15Ic14W0kAPyzpvVpt5aJcNOAr P49hWGupC8CwDJQoNzUcvv033qbXVZpFU= IronPort-SDR: jEs/VE8xPQd4j3qW9r5ZKNVzKSKUkq6K7FXF1Z2fxY8YrKGz9z0A+ML/IDWEA3dnMkGVSbsBkE e9t5YMjXIe3g== WDCIronportException: Internal To: libc-alpha@sourceware.org Subject: [PATCH v3 19/19] Add RISC-V 32-bit target to build-many-glibcs.py Date: Sun, 12 Jul 2020 08:48:11 -0700 Message-Id: <0189f629b149cc35b201bee51b70d407a2e23fb5.1594568655.git.alistair.francis@wdc.com> In-Reply-To: <cover.1594568655.git.alistair.francis@wdc.com> References: <cover.1594568655.git.alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org> Reply-To: Alistair Francis <alistair.francis@wdc.com> Cc: alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org>
Series	glibc port for 32-bit RISC-V (RV32) \| [v3,00/19] glibc port for 32-bit RISC-V (RV32) [v3,01/19] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 [v3,02/19] RISC-V: Cleanup some of the sysdep.h code [v3,03/19] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port [v3,04/19] RISC-V: Add support for 32-bit vDSO calls [v3,05/19] RISC-V: Support dynamic loader for the 32-bit [v3,06/19] sysv/linux: riscv: Fix dl-cache.h indentation [v3,07/19] RISC-V: Add path of library directories for the 32-bit [v3,08/19] RISC-V: Add arch-syscall.h for RV32 [v3,09/19] RISC-V: nptl: update default pthread-offsets.h [v3,10/19] RISC-V: Support the 32-bit ABI implementation [v3,11/19] RISC-V: Hard float support for 32-bit [v3,12/19] RISC-V: Add ABI lists [v3,13/19] RISC-V: Add the RV32 libm-test-ulps [v3,14/19] RISC-V: Fix llrint and llround missing exceptions on RV32 [v3,15/19] RISC-V: Build Infastructure for 32-bit [v3,16/19] riscv32: Specify the arch_minimum_kernel as 5.4 [v3,17/19] RISC-V: Add rv32 path to RTLDLIST in ldd [v3,18/19] Documentation for the RISC-V 32-bit port [v3,19/19] Add RISC-V 32-bit target to build-many-glibcs.py

Commit Message

Alistair Francis July 12, 2020, 3:48 p.m. UTC

  From: Zong Li <zongbox@gmail.com>

Support building three variant of 32 bit RISC-V glibc as follows:
- riscv32-linux-gnu-rv32imac-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32d
---
 scripts/build-many-glibcs.py | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Maciej W. Rozycki July 15, 2020, 1:16 a.m. UTC | #1

On Sun, 12 Jul 2020, Alistair Francis via Libc-alpha wrote:

> Support building three variant of 32 bit RISC-V glibc as follows:

Support building three variants of 32-bit RISC-V glibc as follows:

 Otherwise OK.

  Maciej

diff mbox series

Patch

diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py
index 00ba6f6b11..b623c34f4b 100755
--- a/scripts/build-many-glibcs.py
+++ b/scripts/build-many-glibcs.py
@@ -347,6 +347,21 @@  class Context(object):
         self.add_config(arch='powerpc64le',
                         os_name='linux-gnu',
                         gcc_cfg=['--disable-multilib', '--enable-secureplt'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imac-ilp32',
+                        gcc_cfg=['--with-arch=rv32imac', '--with-abi=ilp32',
+                                 '--disable-multilib'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imafdc-ilp32',
+                        gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32',
+                                 '--disable-multilib'])
+        self.add_config(arch='riscv32',
+                        os_name='linux-gnu',
+                        variant='rv32imafdc-ilp32d',
+                        gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32d',
+                                 '--disable-multilib'])
         self.add_config(arch='riscv64',
                         os_name='linux-gnu',
                         variant='rv64imac-lp64',