From patchwork Tue Jun 10 17:01:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 1422 Received: (qmail 13792 invoked by alias); 10 Jun 2014 17:01:10 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 13766 invoked by uid 89); 10 Jun 2014 17:01:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com From: "Wilco" To: "GNU C Library" Subject: [PATCH 5/5] ARM: Cleanup fenv implementation Date: Tue, 10 Jun 2014 18:01:00 +0100 Message-ID: <003e01cf84cd$8e1cfbe0$aa56f3a0$@com> MIME-Version: 1.0 X-MC-Unique: 114061018010508501 Hi, This is a series of patches which improves the ARM fenv implementation. Improve fesetenv to use a similar optimized implementation as feupdateenv. OK for checkin? Wilco ChangeLog: 2014-06-10 Wilco * sysdeps/arm/fesetenv.c (fesetenv): Optimize implementation. --- sysdeps/arm/fesetenv.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/sysdeps/arm/fesetenv.c b/sysdeps/arm/fesetenv.c index 62031d5..66b248a 100644 --- a/sysdeps/arm/fesetenv.c +++ b/sysdeps/arm/fesetenv.c @@ -17,14 +17,13 @@ . */ #include -#include #include int fesetenv (const fenv_t *envp) { - fpu_control_t fpscr; + fpu_control_t fpscr, new_fpscr, updated_fpscr; /* Fail if a VFP unit isn't present. */ if (!ARM_HAVE_VFP) @@ -32,25 +31,31 @@ fesetenv (const fenv_t *envp) _FPU_GETCW (fpscr); - /* Preserve the reserved FPSCR flags. */ - fpscr &= _FPU_RESERVED; + if ((envp != FE_DFL_ENV) && (envp != FE_NOMASK_ENV)) + { + /* The new FPSCR is valid, so don't merge the reserved flags. */ + new_fpscr = envp->__cw; - if (envp == FE_DFL_ENV) - fpscr |= _FPU_DEFAULT; - else if (envp == FE_NOMASK_ENV) - fpscr |= _FPU_IEEE; - else - fpscr |= envp->__cw & ~_FPU_RESERVED; + /* Write new FPSCR if different (ignoring NZCV flags). */ + if (((fpscr ^ new_fpscr) & ~_FPU_MASK_NZCV) != 0) + _FPU_SETCW (new_fpscr); - _FPU_SETCW (fpscr); + return 0; + } - if (envp == FE_NOMASK_ENV) + /* Preserve the reserved FPSCR flags. */ + new_fpscr = fpscr & _FPU_RESERVED; + new_fpscr |= (envp == FE_DFL_ENV) ? _FPU_DEFAULT : _FPU_IEEE; + + if (((new_fpscr ^ fpscr) & ~_FPU_MASK_NZCV) != 0) { + _FPU_SETCW (new_fpscr); + /* Not all VFP architectures support trapping exceptions, so test whether the relevant bits were set and fail if not. */ - _FPU_GETCW (fpscr); - if ((fpscr & _FPU_IEEE) != _FPU_IEEE) - return 1; + _FPU_GETCW (updated_fpscr); + + return new_fpscr & ~updated_fpscr; } return 0;