From patchwork Thu Oct 23 17:34:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 3343 Received: (qmail 31617 invoked by alias); 23 Oct 2014 17:35:01 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 31598 invoked by uid 89); 23 Oct 2014 17:35:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com From: "Wilco Dijkstra" To: Subject: [PATCH 6/13] AArch64: Cleanup fenv implementation Date: Thu, 23 Oct 2014 18:34:54 +0100 Message-ID: <001001cfeee7$a8536f10$f8fa4d30$@com> MIME-Version: 1.0 X-MC-Unique: 114102318345701201 Cleanup feenableexcept to use the same logic as the ARM version. No functional changes. ChangeLog: 2014-10-23 Wilco Dijkstra * sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept): Simplify logic. --- sysdeps/aarch64/fpu/feenablxcpt.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/sysdeps/aarch64/fpu/feenablxcpt.c b/sysdeps/aarch64/fpu/feenablxcpt.c index 70e413c..763248f 100644 --- a/sysdeps/aarch64/fpu/feenablxcpt.c +++ b/sysdeps/aarch64/fpu/feenablxcpt.c @@ -24,14 +24,9 @@ feenableexcept (int excepts) { fpu_control_t fpcr; fpu_control_t fpcr_new; - int original_excepts; _FPU_GETCW (fpcr); - - original_excepts = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT; - excepts &= FE_ALL_EXCEPT; - fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT); if (fpcr != fpcr_new) @@ -50,5 +45,5 @@ feenableexcept (int excepts) return -1; } - return original_excepts; + return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT; }