From patchwork Thu Oct 23 17:34:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 3341 Received: (qmail 29756 invoked by alias); 23 Oct 2014 17:34:35 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 29668 invoked by uid 89); 23 Oct 2014 17:34:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com From: "Wilco Dijkstra" To: Subject: [PATCH 4/13] AArch64: Cleanup fenv implementation Date: Thu, 23 Oct 2014 18:34:28 +0100 Message-ID: <000e01cfeee7$99383f10$cba8bd30$@com> MIME-Version: 1.0 X-MC-Unique: 114102318343016901 Cleanup feclearexcept to use the same logic as the ARM version. No functional changes. ChangeLog: 2014-10-23 Wilco Dijkstra * sysdeps/aarch64/fpu/fclrexcpt.c (feclearexcept): Simplify logic. Reviewed-by: Carlos O'Donell --- sysdeps/aarch64/fpu/fclrexcpt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/aarch64/fpu/fclrexcpt.c b/sysdeps/aarch64/fpu/fclrexcpt.c index b24f0ff..4471373 100644 --- a/sysdeps/aarch64/fpu/fclrexcpt.c +++ b/sysdeps/aarch64/fpu/fclrexcpt.c @@ -28,7 +28,7 @@ feclearexcept (int excepts) excepts &= FE_ALL_EXCEPT; _FPU_GETFPSR (fpsr); - fpsr_new = (fpsr & ~FE_ALL_EXCEPT) | (fpsr & FE_ALL_EXCEPT & ~excepts); + fpsr_new = fpsr & ~excepts; if (fpsr != fpsr_new) _FPU_SETFPSR (fpsr_new);