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Return-Path: <libc-alpha-bounces@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 642D438618F6; Wed, 12 Aug 2020 14:50:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 642D438618F6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1597243852; bh=OYjiIEtUMhqJWuRsix9P6U94OMR/VVJLRFeBvWeZDq8=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=EcCq/dy5nnqR4nlc18XbnwZSrb3/ZtuyiL4yNMNcqjmyg3gaDm4jknzjze9sXUVXh /Xio3n9eXscRXAqy/i05LCOWKXh7t6TvPUiUh91S+5Fac9vC8TE8s/EF8sjr5V1wRD qBxKk6F5wPq7JW3k2JnWp51+s8UGs+geYvkoQH0E= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from esa6.hgst.iphmx.com (esa6.hgst.iphmx.com [216.71.154.45]) by sourceware.org (Postfix) with ESMTPS id AF3273857C40 for <libc-alpha@sourceware.org>; Wed, 12 Aug 2020 14:50:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org AF3273857C40 IronPort-SDR: cuq/NN57uKd1FwW1H2eC+tY4T1ktNPPIOEgxqA8JYQTaHXzrzqhtQrbVCXQS2Y7obKN68ZSz6j rK8/uytPYMKkEeLPsiS4a+hhfNYgiMpMb+3bn/XhA0S1BpadVFKrHg/xVt102BxW/6D9wOS2// E3dsm5Cl4KILGEN13EPwdJQyjQLSn6r+OrSot6bj4YyjXwtQbAY6l+fLUFkgKRF+2t4VCehqkW jSvlsN4y0ZdcTKzr5+nb6huC1chpn+RIlLnN72s9/P0WEaavbvOlOmWUCAzj3Gb3rVW8se6wbR rok= X-IronPort-AV: E=Sophos;i="5.76,304,1592841600"; d="scan'208";a="145996620" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 12 Aug 2020 22:50:45 +0800 IronPort-SDR: Jk7/a7JoSv8u+6u5C81xi1Y4BnAHRpzwdALIZL4DtjHCSfqR0YB0D30tPEguzecFL2e6MaeOvF UjlYFzyg6IfA== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2020 07:38:36 -0700 IronPort-SDR: 0PNrBPPircnHQopobti0XgSA/FCN5GMRbUL6EdC4CX8veB45KsNXlkkZU6JzG48ADm87BVQxMH oops03G+lWUw== WDCIronportException: Internal Received: from jbfyk72.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.59.14]) by uls-op-cesaip01.wdc.com with ESMTP; 12 Aug 2020 07:50:43 -0700 To: libc-alpha@sourceware.org Subject: [PATCH v4 00/18] glibc port for 32-bit RISC-V (RV32) Date: Wed, 12 Aug 2020 07:40:44 -0700 Message-Id: <cover.1597243100.git.alistair.francis@wdc.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list <libc-alpha.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/libc-alpha/> List-Post: <mailto:libc-alpha@sourceware.org> List-Help: <mailto:libc-alpha-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=subscribe> From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org> Reply-To: Alistair Francis <alistair.francis@wdc.com> Cc: macro@wdc.com, alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org> |
| Series |
glibc port for 32-bit RISC-V (RV32)
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Message
Alistair Francis
Aug. 12, 2020, 2:40 p.m. UTC
This patch set contains the glibc port for 32-bit RISC-V.
This is based on the original work from Zong Li [1] and has been
updated to use a 64-bit time_t.
This requires a 5.4+ kernel and all of the testing has been done using
the 5.4 stable kernel.
Nothing fails when running ./scripts/build-many-glibcs.py (for all
targets) on my x86-64 machine.
This is the current list of tests that fail when running inside QEMU RV32
system emulation on the 5.4 kernel:
FAIL: elf/tst-libc_dlvsym
FAIL: elf/tst-libc_dlvsym-static
FAIL: io/tst-lockf
FAIL: login/check-abi-libutil
FAIL: rt/tst-cpuclock2
FAIL: stdlib/tst-strfrom
FAIL: stdlib/tst-strfrom-locale
FAIL: support/tst-timespec
---Links---
1: https://sourceware.org/ml/libc-alpha/2018-07/msg00892.html
The latest version of my work can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.next
This specific version can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.4
---Changelog---
v4:
- Address comments on v3
- Rebase on 2.33 glibc
v3:
- Re-write the library path detection
- Drop the ipctypes change
- Fix comments and code sytle
- Use __WORDSIZE in replace of __riscv_xlen in places
- Other changes requested in review
v2:
- Rebase on master
v1:
- Update based from feedback on RFCv6
- Improve test passing
- There are only 9 tests failing now
- Rebase on Lukasz's work
- Send only the RV32 specific patches (other patches are already merged
or on the list)
RFC v6:
- Rebase on top of accetpted patches
- Fix issues so that the tests actually run
RFC v5:
- Hopefully finally get the correct layout for the *64 syscalls
- Sort out the Changelog
RFC v4:
- Continue to fix things that weren't working
- Update the coding style to match glibc
- Update the __ASSUME_TIME64_SYSCALLS work to better match Lukasz's
work
RFC v3:
- Remove all "Hack" patches
- Incorporate upstream comments
- Ensure we don't break RV64
- Lot's more testing and fixes
RFC v2:
- Add Lukasz's patches
- Update the non HACK syscalls after feedback
- define __ASSUME_TIME64_SYSCALLS and __ASSUME_RLIM64_SYSCALLS
- Remove lockf64.c
- Other smaller changes from RFC v1
Alistair Francis (12):
RISC-V: Use 64-bit time_t and off_t for RV32 and RV64
RISC-V: Cleanup some of the sysdep.h code
RISC-V: Use 64-bit-time syscall numbers with the 32-bit port
RISC-V: Add support for 32-bit vDSO calls
RISC-V: Add path of library directories for the 32-bit
sysv/linux: riscv: Fix dl-cache.h indentation
RISC-V: Add arch-syscall.h for RV32
RISC-V: Support the 32-bit ABI implementation
RISC-V: Add 32-bit ABI lists
RISC-V: Add the RV32 libm-test-ulps
riscv32: Specify the arch_minimum_kernel as 5.4
Documentation for the RISC-V 32-bit port
Zong Li (6):
RISC-V: Support dynamic loader for the 32-bit
RISC-V: Hard float support for 32-bit
RISC-V: Fix llrint and llround missing exceptions on RV32
RISC-V: Build infastructure for 32-bit port
RISC-V: Add rv32 path to RTLDLIST in ldd
Add RISC-V 32-bit target to build-many-glibcs.py
NEWS | 9 +-
README | 1 +
scripts/build-many-glibcs.py | 15 +
sysdeps/riscv/bits/wordsize.h | 9 +-
sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 26 +-
sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 +-
sysdeps/riscv/nptl/pthread-offsets.h | 17 +-
sysdeps/riscv/preconfigure | 6 +-
sysdeps/riscv/rv32/Implies-after | 1 +
.../riscv/rv32/fix-fp-int-convert-overflow.h | 38 +
sysdeps/riscv/rv32/rvd/Implies | 3 +
sysdeps/riscv/rv32/rvd/libm-test-ulps | 1405 ++++++++++++
sysdeps/riscv/rv32/rvd/libm-test-ulps-name | 1 +
sysdeps/riscv/rv32/rvd/s_lrint.c | 31 +
sysdeps/riscv/rv32/rvd/s_lround.c | 31 +
sysdeps/riscv/rv32/rvf/Implies | 1 +
sysdeps/riscv/rv32/rvf/s_lrintf.c | 31 +
sysdeps/riscv/rv32/rvf/s_lroundf.c | 31 +
sysdeps/riscv/sfp-machine.h | 27 +-
sysdeps/riscv/sys/asm.h | 7 +-
sysdeps/unix/sysv/linux/riscv/Makefile | 8 +-
.../unix/sysv/linux/riscv/bits/environments.h | 81 +
sysdeps/unix/sysv/linux/riscv/bits/time64.h | 36 +
sysdeps/unix/sysv/linux/riscv/bits/timesize.h | 22 +
sysdeps/unix/sysv/linux/riscv/configure | 43 +
sysdeps/unix/sysv/linux/riscv/configure.ac | 12 +
sysdeps/unix/sysv/linux/riscv/dl-cache.h | 73 +-
.../unix/sysv/linux/riscv/jmp_buf-macros.h | 55 +
sysdeps/unix/sysv/linux/riscv/kernel_stat.h | 23 +
sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +-
sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed | 2 +-
sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 +
.../unix/sysv/linux/riscv/rv32/arch-syscall.h | 284 +++
.../unix/sysv/linux/riscv/rv32/c++-types.data | 67 +
sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist | 5 +
.../linux/riscv/rv32/libBrokenLocale.abilist | 1 +
.../unix/sysv/linux/riscv/rv32/libanl.abilist | 4 +
.../unix/sysv/linux/riscv/rv32/libc.abilist | 1935 +++++++++++++++++
.../sysv/linux/riscv/rv32/libcrypt.abilist | 2 +
.../unix/sysv/linux/riscv/rv32/libdl.abilist | 9 +
.../unix/sysv/linux/riscv/rv32/libm.abilist | 940 ++++++++
.../sysv/linux/riscv/rv32/libpthread.abilist | 213 ++
.../sysv/linux/riscv/rv32/libresolv.abilist | 79 +
.../unix/sysv/linux/riscv/rv32/librt.abilist | 35 +
.../linux/riscv/rv32/libthread_db.abilist | 40 +
.../sysv/linux/riscv/rv32/libutil.abilist | 6 +
sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 +-
sysdeps/unix/sysv/linux/riscv/sysdep.h | 59 +-
48 files changed, 5689 insertions(+), 77 deletions(-)
create mode 100644 sysdeps/riscv/rv32/Implies-after
create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h
create mode 100644 sysdeps/riscv/rv32/rvd/Implies
create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps
create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps-name
create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c
create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c
create mode 100644 sysdeps/riscv/rv32/rvf/Implies
create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c
create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c
create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/environments.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/time64.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/timesize.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/kernel_stat.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/arch-syscall.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist
Comments
On Wed, 12 Aug 2020, Alistair Francis via Libc-alpha wrote:
> FAIL: login/check-abi-libutil
You should never have ABI test failures (or any compilation test failures)
in a port when it is submitted; a port with such failures is not ready for
inclusion in glibc.
On Wed, Aug 12, 2020 at 10:37 AM Joseph Myers <joseph@codesourcery.com> wrote: > > On Wed, 12 Aug 2020, Alistair Francis via Libc-alpha wrote: > > > FAIL: login/check-abi-libutil > > You should never have ABI test failures (or any compilation test failures) > in a port when it is submitted; a port with such failures is not ready for > inclusion in glibc. This is a mistake. It is actually passing, this failure is from using an incorrect prefix. I have fixed it in my tests but forgot to remove it from the cover letter. Alistair > > -- > Joseph S. Myers > joseph@codesourcery.com