From patchwork Sun Jul 12 15:47:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 40052 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 969D33851C29; Sun, 12 Jul 2020 15:57:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 969D33851C29 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1594569438; bh=9NkcHJnGON2+14ym/wDPvh3Nu2F8zGUbEVAIyP7nQ8k=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=rA0K6RS0D3cOMP7F5x9D5u6XnwxHdNbgH5NDeF+jRtU0C3DdYQh6MSoyXjMHYPobq 0DVDHnyaLMx79yzvKaWv3GA3g2uSk0j9p7ez8pZI4aoafu+pCDYS21AsCHcVBtDRWn nBKU39Uys2q8RFbJBxHTqobsPOsF6NKh2uvuqC+c= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from esa3.hgst.iphmx.com (esa3.hgst.iphmx.com [216.71.153.141]) by sourceware.org (Postfix) with ESMTPS id 157DF3858D37 for ; Sun, 12 Jul 2020 15:57:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 157DF3858D37 IronPort-SDR: Ysoo6vEdt+G8XQF3cQqDh2UQY7fvXN9s2QHG/ZPM3UUY4x0d9wnOv3XCGHosGZDBNEfHpOUFCV 4TUZXlJSWdDJDphQ0OnPRFTAzE7uvC/a2lOFS/YzMeVS83xI8A4komQweP1A7Qs7Lp2umZnalk kw97kj3T1R9c9DY3/ssXdt++V+bY8ngLYWilrOaIaMAOddMnmQsFXYH6xVE7CCaExczOiTuo4B T5+xQT1lycQo7WYUvI8uN/xmRjiT/d/Ub8h/WvpF2km4xuLSO8/u0G3TGFRPkWe23aZe+0wQ2/ 0oQ= X-IronPort-AV: E=Sophos;i="5.75,344,1589212800"; d="scan'208";a="146561174" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 12 Jul 2020 23:56:52 +0800 IronPort-SDR: zKA54myjEN9Pz3W116zgT9oeaqpBH0+RPmJENxSLRHVXoQi+7/ptJ4auqg2gwZdPyt7Vd1BOB+ ymiedVc4yyPAzfdS1QbElh4Vh4V7BqwVM= Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2020 08:44:48 -0700 IronPort-SDR: hdTnWuipJbhMFv5RKXXZKz2iApNfeN+JIVV77zRl88AzE4uwsOe89JEbZnljtAfc6WK6Y6S2P8 ziBGbFinu/GA== WDCIronportException: Internal Received: from usa002626.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.57.178]) by uls-op-cesaip02.wdc.com with ESMTP; 12 Jul 2020 08:56:51 -0700 To: libc-alpha@sourceware.org Subject: [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Date: Sun, 12 Jul 2020 08:47:20 -0700 Message-Id: X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alistair Francis via Libc-alpha From: Alistair Francis Reply-To: Alistair Francis Cc: alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" This patch set contains the glibc port for 32-bit RISC-V. This is based on the original work from Zong Li [1] and has been updated to use a 64-bit time_t. This requires a 5.4+ kernel and all of the testing has been done using the 5.4 stable kernel. Nothing fails when running ./scripts/build-many-glibcs.py (for all targets) on my x86-64 machine. This is the current list of tests that fail when running inside QEMU RV32 system emulation on the 5.4 kernel: FAIL: elf/check-abi-libc FAIL: elf/tst-ldconfig-ld_so_conf-update FAIL: elf/tst-libc_dlvsym FAIL: elf/tst-libc_dlvsym-static FAIL: io/tst-lockf FAIL: nss/tst-nss-files-hosts-long FAIL: stdlib/tst-strfrom FAIL: stdlib/tst-strfrom-locale FAIL: support/tst-timespec ---Links--- 1: https://sourceware.org/ml/libc-alpha/2018-07/msg00892.html The latest version of my work can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.next This specific version can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.3 ---Changelog--- v3: - Re-write the library path detection - Drop the ipctypes change - Fix comments and code sytle - Use __WORDSIZE in replace of __riscv_xlen in places - Other changes requested in review v2: - Rebase on master v1: - Update based from feedback on RFCv6 - Improve test passing - There are only 9 tests failing now - Rebase on Lukasz's work - Send only the RV32 specific patches (other patches are already merged or on the list) RFC v6: - Rebase on top of accetpted patches - Fix issues so that the tests actually run RFC v5: - Hopefully finally get the correct layout for the *64 syscalls - Sort out the Changelog RFC v4: - Continue to fix things that weren't working - Update the coding style to match glibc - Update the __ASSUME_TIME64_SYSCALLS work to better match Lukasz's work RFC v3: - Remove all "Hack" patches - Incorporate upstream comments - Ensure we don't break RV64 - Lot's more testing and fixes RFC v2: - Add Lukasz's patches - Update the non HACK syscalls after feedback - define __ASSUME_TIME64_SYSCALLS and __ASSUME_RLIM64_SYSCALLS - Remove lockf64.c - Other smaller changes from RFC v1 Alistair Francis (12): RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 RISC-V: Cleanup some of the sysdep.h code RISC-V: Use 64-bit-time syscall numbers with the 32-bit port RISC-V: Add support for 32-bit vDSO calls sysv/linux: riscv: Fix dl-cache.h indentation RISC-V: Add path of library directories for the 32-bit RISC-V: Add arch-syscall.h for RV32 RISC-V: nptl: update default pthread-offsets.h RISC-V: Add ABI lists RISC-V: Add the RV32 libm-test-ulps riscv32: Specify the arch_minimum_kernel as 5.4 Documentation for the RISC-V 32-bit port Zong Li (7): RISC-V: Support dynamic loader for the 32-bit RISC-V: Support the 32-bit ABI implementation RISC-V: Hard float support for 32-bit RISC-V: Fix llrint and llround missing exceptions on RV32 RISC-V: Build Infastructure for 32-bit RISC-V: Add rv32 path to RTLDLIST in ldd Add RISC-V 32-bit target to build-many-glibcs.py NEWS | 6 + README | 1 + scripts/build-many-glibcs.py | 15 + sysdeps/riscv/bits/wordsize.h | 9 +- sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 18 +- sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 +- sysdeps/riscv/nptl/pthread-offsets.h | 13 +- sysdeps/riscv/preconfigure | 6 +- sysdeps/riscv/rv32/Implies-after | 1 + .../riscv/rv32/fix-fp-int-convert-overflow.h | 38 + sysdeps/riscv/rv32/rvd/Implies | 3 + sysdeps/riscv/rv32/rvd/libm-test-ulps | 1402 +++++++++++ sysdeps/riscv/rv32/rvd/libm-test-ulps-name | 1 + sysdeps/riscv/rv32/rvd/s_lrint.c | 31 + sysdeps/riscv/rv32/rvd/s_lround.c | 31 + sysdeps/riscv/rv32/rvf/Implies | 1 + sysdeps/riscv/rv32/rvf/s_lrintf.c | 31 + sysdeps/riscv/rv32/rvf/s_lroundf.c | 31 + sysdeps/riscv/sfp-machine.h | 27 +- sysdeps/riscv/sys/asm.h | 5 +- sysdeps/unix/sysv/linux/riscv/Makefile | 4 +- .../unix/sysv/linux/riscv/bits/environments.h | 81 + sysdeps/unix/sysv/linux/riscv/bits/time64.h | 36 + sysdeps/unix/sysv/linux/riscv/bits/timesize.h | 22 + sysdeps/unix/sysv/linux/riscv/c++-types.data | 67 + sysdeps/unix/sysv/linux/riscv/configure | 43 + sysdeps/unix/sysv/linux/riscv/configure.ac | 12 + sysdeps/unix/sysv/linux/riscv/dl-cache.h | 81 +- .../unix/sysv/linux/riscv/fixup-asm-unistd.h | 45 + .../unix/sysv/linux/riscv/jmp_buf-macros.h | 53 + sysdeps/unix/sysv/linux/riscv/kernel_stat.h | 23 + sysdeps/unix/sysv/linux/riscv/ld.abilist | 5 + sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +- sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed | 2 +- .../sysv/linux/riscv/libBrokenLocale.abilist | 1 + sysdeps/unix/sysv/linux/riscv/libanl.abilist | 4 + sysdeps/unix/sysv/linux/riscv/libc.abilist | 2098 +++++++++++++++++ .../unix/sysv/linux/riscv/libcrypt.abilist | 2 + sysdeps/unix/sysv/linux/riscv/libdl.abilist | 9 + sysdeps/unix/sysv/linux/riscv/libm.abilist | 940 ++++++++ .../unix/sysv/linux/riscv/libpthread.abilist | 213 ++ .../unix/sysv/linux/riscv/libresolv.abilist | 79 + sysdeps/unix/sysv/linux/riscv/librt.abilist | 35 + .../sysv/linux/riscv/libthread_db.abilist | 40 + sysdeps/unix/sysv/linux/riscv/libutil.abilist | 6 + sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 + .../unix/sysv/linux/riscv/rv32/arch-syscall.h | 283 +++ sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 +- sysdeps/unix/sysv/linux/riscv/sysdep.h | 62 +- 49 files changed, 5881 insertions(+), 77 deletions(-) create mode 100644 sysdeps/riscv/rv32/Implies-after create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h create mode 100644 sysdeps/riscv/rv32/rvd/Implies create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps-name create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c create mode 100644 sysdeps/riscv/rv32/rvf/Implies create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/environments.h create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/time64.h create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/timesize.h create mode 100644 sysdeps/unix/sysv/linux/riscv/c++-types.data create mode 100644 sysdeps/unix/sysv/linux/riscv/fixup-asm-unistd.h create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h create mode 100644 sysdeps/unix/sysv/linux/riscv/kernel_stat.h create mode 100644 sysdeps/unix/sysv/linux/riscv/ld.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libBrokenLocale.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libanl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libc.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libcrypt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libdl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libm.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libpthread.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libresolv.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/librt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libthread_db.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/libutil.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/arch-syscall.h