| Message ID | 20260312014203.1916933-1-mengqinggang@loongson.cn (mailing list archive) |
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Return-Path: <libc-alpha-bounces~patchwork=sourceware.org@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id EC3154B920E0 for <patchwork@sourceware.org>; Thu, 12 Mar 2026 01:46:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EC3154B920E0 X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 608354BB5898 for <libc-alpha@sourceware.org>; Thu, 12 Mar 2026 01:46:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 608354BB5898 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 608354BB5898 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1773279982; cv=none; b=YSw23Mhir8HlF2o5lptinm0lwGSEMcGdHzk92s9ny86eFB/DtzPbv2XjaAog2v4tPHC07jQI0Ux8nfP/4XXpTl95wATeCWoeyLilfIdXaasQMupS/tfkPUgG4CJoevjszIXoZxmagGytsSQOq62q6MXN5xxGzYcNyFw93b3fRkE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1773279982; c=relaxed/simple; bh=FrlTjX4bWhvYqKswI2b5GuSnTtNXr+ORZf/oTQTngk0=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=r91J6KYjm1OVkkEAb3z1R1P3uo/adYsC7B0a4KM4raAIqWyrxBl9t496DVfZvPfgEut0S++rVy2YFjPoNyNIdR2xza37pODsRy7RRx7cF6uD/xPNpRTP43EHVslisyEsCcws4EiVTsT05/gL2wKoXXxIgDJn1MeweuzsXHEuY5E= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 608354BB5898 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Ax_6nqGrJp_C0aAA--.17467S3; Thu, 12 Mar 2026 09:46:18 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAx38LjGrJprYBTAA--.28024S2; Thu, 12 Mar 2026 09:46:11 +0800 (CST) From: mengqinggang <mengqinggang@loongson.cn> To: libc-alpha@sourceware.org Cc: adhemerval.zanella@linaro.org, fweimer@redhat.com, xuchenghua@loongson.cn, caiyinyu@loongson.cn, chenglulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, mengqinggang@loongson.cn Subject: [PATCH v6 0/6] Add support for LoongArch32 Date: Thu, 12 Mar 2026 09:41:57 +0800 Message-Id: <20260312014203.1916933-1-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: qMiowJAx38LjGrJprYBTAA--.28024S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TLD_CHINA, TXREP, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list <libc-alpha.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/libc-alpha/> List-Post: <mailto:libc-alpha@sourceware.org> List-Help: <mailto:libc-alpha-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=subscribe> Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org |
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Add support for LoongArch32
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Message
mengqinggang
March 12, 2026, 1:41 a.m. UTC
Add support for LoongArch32(LA32) with ilp32d abi and
LoongArch32 Reduced(LA32R) with ilp32s abi.
The gcc and binutils master branch have added LA32 support.
The kernel has added basic LA32 support[6]. But build infrastructures
of LoongArch32 are not enabled yet, because we need to adjust
irqchip drivers and wait for GNU toolchain be upstream first.
You can build toolchains by script/build-many-glibcs.py:
LA32 ilp32d abi:
build-many-glibcs.py -j128 --keep all . compilers loongarch32-linux-gnu
LA32R ilp32s abi:
build-many-glibcs.py -j128 --keep all . compilers loongarch32-linux-gnusf
LA32 tested by qemu-user and qemu-system.
Most testcases passed on LA32.
Tested on LA64 with no regression.
These patches are based on Jiajie Chen's previous work[1].
A Chinese LA32R instruction set manual is here[2].
There is currently no separate LA32 instruction set manual.
The LA64 instruction set manual[3] specifies the instructions available in LA32.
A LA32 linux system based on qemu user is here[4].
A LA32 linux system based on qemu system is here[5].
[1] https://github.com/jiegec/glibc/tree/loongarch32
[2] https://www.loongson.cn/uploads/images/2025032109211238668.%E9%BE%99%E6%9E%B6%E6%9E%8432%E4%BD%8D%E7%B2%BE%E7%AE%80%E7%89%88%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C_r1p04.pdf
[3] https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-Vol1-EN/basic-integer-instructions/overview-of-basic-integer-instructions.adoc
[4] https://github.com/sunhaiyong1978/CLFS-for-LoongArch32/blob/main/Qemu_For_LoongArch32-Simple.md
[5] https://github.com/sunhaiyong1978/CLFS-for-LoongArch32/blob/main/Qemu_System_For_LoongArch32-Simple.md
[6] https://lore.kernel.org/loongarch/176559874944.2388135.2320307195215147125.pr-tracker-bot@kernel.org/T/#t
v5 -> v6:
- Change 2.43 to 2.44 in abilist files and shlib-versions.
v4 -> v5:
- Set arch_minimum_kernel to 6.19.
- Preprocessor indentation with one space.
- Fix defined but not used for cbaud_to_speed.
- Define the minimum arch for loongarch64.
v3 -> v4:
- Add sysdeps/loongarch/lp64/fpu Implies subfolder for LoongArch64 implementation.
- Set ABI baseline GLIBC_2.43 only for LoongArch32.
- Regenerate abilist files to GLIBC_2.43.
v2 -> v3:
- Delete extra configure checks in configure.ac.
- Change GLIBC_2.36 to GLIBC_2.43 shlib-versions.
v1 -> v2:
- Update syscall list and update abi list.
- Delete libm-test-ulps and libm-test-ulps-name.
- Fix tst-gnu2-tls2: change 24 to 3 * SZREG, change uint64_t to int or long.
Do not check static float registers. Static float registers save and restore
follow the procedure call standard and dot not require tls desc resolver
function processing.
- Change __NR_mmap2 to the previous __NR_mmap on lp64.
- Change SZREG to 8 to match unsigned long long mcontext_t.__gregs.
mengqinggang (6):
LoongArch: Add support for LA32 in sysdeps/loongarch
LoongArch: Add support for LA32 in sysdeps/loongarch/fpu
LoongArch: Add new file for LA32 in sysdeps/loongarch/ilp32
LoongArch: Add support for LA32 in sysdeps/unix/sysv/linux/loongarch
LoongArch: Add new files for LA32 in
sysdeps/unix/sysv/linux/loongarch/ilp32
Fix 'cbaud_to_speed' defined but not used on LA32
scripts/build-many-glibcs.py | 13 +-
sysdeps/loongarch/configure | 29 +-
sysdeps/loongarch/configure.ac | 21 +-
sysdeps/loongarch/dl-machine.h | 16 +-
sysdeps/loongarch/dl-tlsdesc-dynamic.h | 37 +-
sysdeps/loongarch/dl-tlsdesc.S | 6 +-
sysdeps/loongarch/dl-trampoline.h | 4 +-
.../loongarch/fpu/math-use-builtins-llrint.h | 2 +-
.../loongarch/fpu/math-use-builtins-logb.h | 2 +-
.../loongarch/fpu/math-use-builtins-lrint.h | 2 +-
.../loongarch/fpu/math-use-builtins-rint.h | 2 +-
.../loongarch/fpu/math-use-builtins-sqrt.h | 10 +-
sysdeps/loongarch/hp-timing.h | 9 +
sysdeps/loongarch/ilp32/Implies-after | 1 +
sysdeps/loongarch/lp64/fpu/Implies | 1 +
sysdeps/loongarch/{ => lp64}/fpu/e_scalb.c | 0
sysdeps/loongarch/{ => lp64}/fpu/e_scalbf.c | 0
sysdeps/loongarch/{ => lp64}/fpu/s_scalbn.c | 0
sysdeps/loongarch/{ => lp64}/fpu/s_scalbnf.c | 0
.../loongarch/{ => lp64}/fpu/w_ilogb-impl.h | 0
.../loongarch/{ => lp64}/fpu/w_ilogbf-impl.h | 0
sysdeps/loongarch/preconfigure | 3 +-
sysdeps/loongarch/preconfigure.ac | 3 +-
sysdeps/loongarch/sfp-machine.h | 33 +
sysdeps/loongarch/start.S | 32 +-
sysdeps/loongarch/sys/asm.h | 93 +-
sysdeps/loongarch/tst-gnu2-tls2.h | 50 +-
sysdeps/unix/sysv/linux/loongarch/Makefile | 4 +-
sysdeps/unix/sysv/linux/loongarch/clone.S | 10 +-
sysdeps/unix/sysv/linux/loongarch/clone3.S | 8 +-
sysdeps/unix/sysv/linux/loongarch/configure | 44 +
.../unix/sysv/linux/loongarch/configure.ac | 12 +
.../unix/sysv/linux/loongarch/getcontext.S | 12 +-
.../unix/sysv/linux/loongarch/gettimeofday.c | 9 +-
.../unix/sysv/linux/loongarch/ilp32/Implies | 2 +
.../sysv/linux/loongarch/ilp32/arch-syscall.h | 314 +++
.../sysv/linux/loongarch/ilp32/c++-types.data | 67 +
.../sysv/linux/loongarch/ilp32/ld.abilist | 8 +
.../loongarch/ilp32/libBrokenLocale.abilist | 1 +
.../sysv/linux/loongarch/ilp32/libc.abilist | 2289 +++++++++++++++++
.../loongarch/ilp32/libc_malloc_debug.abilist | 28 +
.../sysv/linux/loongarch/ilp32/libm.abilist | 1166 +++++++++
.../linux/loongarch/ilp32/libpthread.abilist | 0
.../linux/loongarch/ilp32/libresolv.abilist | 55 +
.../sysv/linux/loongarch/ilp32/librt.abilist | 0
.../loongarch/ilp32/libthread_db.abilist | 40 +
.../unix/sysv/linux/loongarch/ldd-rewrite.sed | 2 +-
.../linux/loongarch/{ => lp64}/arch-syscall.h | 0
.../unix/sysv/linux/loongarch/pointer_guard.h | 18 +-
.../unix/sysv/linux/loongarch/readelflib.c | 33 +-
.../unix/sysv/linux/loongarch/setcontext.S | 24 +-
.../unix/sysv/linux/loongarch/shlib-versions | 10 +-
.../unix/sysv/linux/loongarch/swapcontext.S | 28 +-
.../sysv/linux/loongarch/syscall_cancel.S | 2 +-
sysdeps/unix/sysv/linux/loongarch/sysdep.S | 8 +-
sysdeps/unix/sysv/linux/loongarch/sysdep.h | 30 +-
.../sysv/linux/loongarch/ucontext-macros.h | 6 +-
sysdeps/unix/sysv/linux/loongarch/vfork.S | 6 +-
sysdeps/unix/sysv/linux/tst-termios-linux.c | 24 +-
59 files changed, 4423 insertions(+), 206 deletions(-)
create mode 100644 sysdeps/loongarch/ilp32/Implies-after
create mode 100644 sysdeps/loongarch/lp64/fpu/Implies
rename sysdeps/loongarch/{ => lp64}/fpu/e_scalb.c (100%)
rename sysdeps/loongarch/{ => lp64}/fpu/e_scalbf.c (100%)
rename sysdeps/loongarch/{ => lp64}/fpu/s_scalbn.c (100%)
rename sysdeps/loongarch/{ => lp64}/fpu/s_scalbnf.c (100%)
rename sysdeps/loongarch/{ => lp64}/fpu/w_ilogb-impl.h (100%)
rename sysdeps/loongarch/{ => lp64}/fpu/w_ilogbf-impl.h (100%)
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/Implies
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/arch-syscall.h
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/c++-types.data
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/ld.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libBrokenLocale.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libc.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libc_malloc_debug.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libm.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libpthread.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libresolv.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/librt.abilist
create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libthread_db.abilist
rename sysdeps/unix/sysv/linux/loongarch/{ => lp64}/arch-syscall.h (100%)