[v7,0/2] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC

Message ID 20250221095740.582183-1-daichengrong@iscas.ac.cn (mailing list archive)
Headers
Series RISC-V: add multiarch RVV support for memcpy using FMV IFUNC |

Message

daichengrong Feb. 21, 2025, 9:57 a.m. UTC
  From: daichengrong <daichengrong@iscas.ac.cn>

Change in v7:
   update dl_hwcap support using kernel header
   update rvv memcpy compile with option,+v
   delete optimization for small lengths

This patch introduces vector support for memcpy with IFUNC.
The implementation selects the RVV optimized memcpy version via dl_hwcap.

daichengrong (2):
  check rvv support in asm at sysdeps/riscv
  add riscv vector support for memcpy

 config.h.in                                   |  3 ++
 sysdeps/riscv/configure                       | 35 ++++++++++++++++++
 sysdeps/riscv/configure.ac                    | 25 +++++++++++++
 sysdeps/riscv/multiarch/memcpy_vector.S       | 37 +++++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/Makefile  |  6 +++
 .../linux/riscv/multiarch/ifunc-impl-list.c   | 14 +++++++
 .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  8 ++++
 7 files changed, 128 insertions(+)
 mode change 100644 => 100755 sysdeps/riscv/configure
 create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
  

Comments

daichengrong March 4, 2025, 2:50 a.m. UTC | #1
在 2025/2/21 17:57:38, daichengrong@iscas.ac.cn 写道:
> From: daichengrong <daichengrong@iscas.ac.cn>
>
> Change in v7:
>     update dl_hwcap support using kernel header
>     update rvv memcpy compile with option,+v
>     delete optimization for small lengths
>
> This patch introduces vector support for memcpy with IFUNC.
> The implementation selects the RVV optimized memcpy version via dl_hwcap.
>
> daichengrong (2):
>    check rvv support in asm at sysdeps/riscv
>    add riscv vector support for memcpy
>
>   config.h.in                                   |  3 ++
>   sysdeps/riscv/configure                       | 35 ++++++++++++++++++
>   sysdeps/riscv/configure.ac                    | 25 +++++++++++++
>   sysdeps/riscv/multiarch/memcpy_vector.S       | 37 +++++++++++++++++++
>   .../unix/sysv/linux/riscv/multiarch/Makefile  |  6 +++
>   .../linux/riscv/multiarch/ifunc-impl-list.c   | 14 +++++++
>   .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  8 ++++
>   7 files changed, 128 insertions(+)
>   mode change 100644 => 100755 sysdeps/riscv/configure
>   create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
I Recently noticed the Patch Queue Review meeting, and as mentioned in 
the previous notes, I am confused about the mean of RISCV maintainers 
are working on this. Does it mean that the RVV support provided by 
machine maintainers will come soon? Before that, any patches on RVV 
support will not be accepted?
  
Xi Ruoyao March 4, 2025, 2:54 a.m. UTC | #2
On Tue, 2025-03-04 at 10:50 +0800, daichengrong wrote:
> 
> 在 2025/2/21 17:57:38, daichengrong@iscas.ac.cn 写道:
> > From: daichengrong <daichengrong@iscas.ac.cn>
> > 
> > Change in v7:
> >     update dl_hwcap support using kernel header
> >     update rvv memcpy compile with option,+v
> >     delete optimization for small lengths
> > 
> > This patch introduces vector support for memcpy with IFUNC.
> > The implementation selects the RVV optimized memcpy version via
> > dl_hwcap.
> > 
> > daichengrong (2):
> >    check rvv support in asm at sysdeps/riscv
> >    add riscv vector support for memcpy
> > 
> >   config.h.in                                   |  3 ++
> >   sysdeps/riscv/configure                       | 35
> > ++++++++++++++++++
> >   sysdeps/riscv/configure.ac                    | 25 +++++++++++++
> >   sysdeps/riscv/multiarch/memcpy_vector.S       | 37
> > +++++++++++++++++++
> >   .../unix/sysv/linux/riscv/multiarch/Makefile  |  6 +++
> >   .../linux/riscv/multiarch/ifunc-impl-list.c   | 14 +++++++
> >   .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  8 ++++
> >   7 files changed, 128 insertions(+)
> >   mode change 100644 => 100755 sysdeps/riscv/configure
> >   create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
> I Recently noticed the Patch Queue Review meeting, and as mentioned in
> the previous notes, I am confused about the mean of RISCV maintainers 
> are working on this. Does it mean that the RVV support provided by 
> machine maintainers will come soon? Before that, any patches on RVV 
> support will not be accepted?

No, it means the RISC-V maintainers should review this patch.