From patchwork Wed May 18 19:14:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 54177 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 357DA384602A for ; Wed, 18 May 2022 19:15:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 357DA384602A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1652901305; bh=ZUX4qLeSUMd4s91XJVvIN3xxLkuR3/wFk00aSwIclcA=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=V/4BT3nVt0MQliXQJELS8xqkQ1n3BfUaB+8gl/aytntoJogM6gj0JQkJ0W5Ouuqqn uu7V4lgGgeDgE6BpFqbTCwCks6A+DEabAQziptdgcFXKS4H1877Xph54lJVrjySNZ2 +DpOcNeY3ZKcFIp28+ikIvxexMx752xkLYiwU/9o= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oa1-x2b.google.com (mail-oa1-x2b.google.com [IPv6:2001:4860:4864:20::2b]) by sourceware.org (Postfix) with ESMTPS id 294D838485AB for ; Wed, 18 May 2022 19:14:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 294D838485AB Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-e656032735so4052217fac.0 for ; Wed, 18 May 2022 12:14:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZUX4qLeSUMd4s91XJVvIN3xxLkuR3/wFk00aSwIclcA=; b=S7r2Xnftt7LOaQbt0WeZYNm3FYCVdU5ez9QLbYFm5/zd/Y/VbGqoGLgUSnf5nrjitw 20ZhGYI6vJHPXSHFupxYJYrvgGezKVFPmuIaSWPUeALVCdpzZgZnp7J4smwv1dkNpC6M jNFKK1/p+iWObYYLgZEW8dyiq9gdaujWNy0Uk3HqnXrrOt7m+zbl/MlsaR5fVXg4ls6z UJiwT+ZsrrjVz7EosBukLwE2BP3BWjmMhc0eosnnBJEg8qiw+lhH3trfDm6Se9sjn+5E iD2f6FRAc8F94at20vBzMD2UYYOjL/lmvBTI9ggKv1BCEnMOT0JmyHJFyZ8elGtQYA6T HKJw== X-Gm-Message-State: AOAM533/Rl7mKxW3bc6lI6H+O+4RcNlPZz8EkCiqGFO1PYH1QDzU3dKd 2rLO3cqZGX0AsE72SAjk/gxc+JPPayfr6w== X-Google-Smtp-Source: ABdhPJz9RvB8n3HmbGM7zUA9p2fRcBYDxGBMJYZ4ycZUL0cSutuasYsTFG9GPl5RbpVaFGKtQmKWNA== X-Received: by 2002:a05:6870:8193:b0:f1:97b7:7a18 with SMTP id k19-20020a056870819300b000f197b77a18mr639674oae.78.1652901268986; Wed, 18 May 2022 12:14:28 -0700 (PDT) Received: from birita.. ([2804:431:c7cb:cdd6:1a62:669c:7cd2:ac43]) by smtp.gmail.com with ESMTPSA id i131-20020acaea89000000b00325cda1ffbasm1033011oih.57.2022.05.18.12.14.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 May 2022 12:14:28 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH v6 00/10] Add arc4random support Date: Wed, 18 May 2022 16:14:14 -0300 Message-Id: <20220518191424.3630729-1-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Adhemerval Zanella via Libc-alpha From: Adhemerval Zanella Reply-To: Adhemerval Zanella Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This patch adds the arc4random, arc4random_buf, and arc4random_uniform along with optimized versions for x86_64 (sse2 and avx2), aarch64, powerpc64 (power8), and s390x (vx). The generic implementation is based on scalar Chacha20, with a per thread state cache allocated in TCB. The internal state keeps a 256 bytes buffer (8 ChaCha20 blocks) plus the cipher state, which allows to better use the vectorized optimized version. It would be possible to use just 128 bytes, but it would require to rewrite the AVX2 optimization (and possible it would lower performance slight). The initial state and reseed uses getrandom or /dev/urandom as fallback and reseeds the internal state on every 16MB of consumed entropy. There is no fork detection, the internal state is reset only for fork and _Fork calls. It does not handle direct clone calls nor vfork. Although it is lock-free, arc4random is still not async-signal-safe (the per thread state is not updated atomically), although it is async-cancel-safe. The generic ChaCha20 implementation is based on the RFC8439 [1] without the last XOR step. Since the input stream will either zero bytes (initial state) or the PRNG output itself this step does not add any extra entropy. The optimized ChaCha20 implementations for x86_64, aarch64, powerpc64, and s390x use vectorized instruction and they are based on libgcrypt code. ChaCha20 is used because is the standard cipher used on different arc4random implementation (BSDs, MacOSX), and recently on Linux random subsystem. It also offers a very cheap rekey, which uses periodically uses kernel entropy to improve randomness; it is also simpler than AES, and shows better performance when no specialized instructions are present. [1] https://sourceware.org/pipermail/libc-alpha/2018-June/094879.html v6: * Replace array usage with variables and make compiler add hardening if required to cleanup any internal state. It also shows slight better performance. * Add tests for arc4random and arc4random_uniform on thread and fork. * Fixed documentation to state the functiosn as async-signal-unsafe. v5: * Added documentation. * Fixed typos. v4: * Fixed typos and expanded comments. * Fixed powerpc multi-arch organization. v3: * Add per-thread cache to remove the lock usage. It should improve both performance and scalability. * Improve benchmark precision. * Fixed Hurd test build. v2: * Removed the last XOR operation on ChaCha20 implementation (it does not much on arc4random usage). * Add tst-arc4random-chacha20.c and refactor to check against the expected implementation. * Fixed aarch64 implementation (a last change to move symbols to hidden did not change the relocation to use it as well). * Refactor x86 SSSE3 to SSE2. * Fixed powerpc64 implementation on BE (use the correct macro to check for endianess instead the ones from libgcrpyt). * Add s390x optimized ChaCha20 implementation. Adhemerval Zanella (10): stdlib: Add arc4random, arc4random_buf, and arc4random_uniform (BZ #4417) stdlib: Add arc4random tests benchtests: Add arc4random benchtest aarch64: Add optimized chacha20 x86: Add SSE2 optimized chacha20 x86: Add AVX2 optimized chacha20 powerpc64: Add optimized chacha20 s390x: Add optimized chacha20 stdlib: Add TLS optimization to arc4random manual: Add documentation for arc4random functions LICENSES | 22 + NEWS | 4 + benchtests/Makefile | 5 +- benchtests/bench-arc4random.c | 224 +++++++ include/stdlib.h | 13 + malloc/thread-freeres.c | 2 +- manual/math.texi | 49 ++ nptl/allocatestack.c | 5 +- stdlib/Makefile | 9 + stdlib/Versions | 5 + stdlib/arc4random.c | 177 ++++++ stdlib/arc4random.h | 45 ++ stdlib/arc4random_uniform.c | 140 +++++ stdlib/chacha20.c | 191 ++++++ stdlib/stdlib.h | 14 + stdlib/tst-arc4random-chacha20.c | 166 ++++++ stdlib/tst-arc4random-fork.c | 197 ++++++ stdlib/tst-arc4random-stats.c | 146 +++++ stdlib/tst-arc4random-thread.c | 341 +++++++++++ sysdeps/aarch64/Makefile | 4 + sysdeps/aarch64/chacha20-neon.S | 323 ++++++++++ sysdeps/aarch64/chacha20_arch.h | 40 ++ sysdeps/generic/chacha20_arch.h | 24 + sysdeps/generic/not-cancel.h | 2 + sysdeps/generic/tls-internal-struct.h | 3 + sysdeps/generic/tls-internal.c | 13 + sysdeps/generic/tls-internal.h | 7 +- sysdeps/mach/hurd/_Fork.c | 2 + sysdeps/mach/hurd/i386/libc.abilist | 5 +- sysdeps/mach/hurd/not-cancel.h | 3 + sysdeps/nptl/_Fork.c | 2 + .../powerpc/powerpc64/be/multiarch/Makefile | 4 + .../powerpc64/be/multiarch/chacha20-ppc.c | 1 + .../powerpc64/be/multiarch/chacha20_arch.h | 42 ++ sysdeps/powerpc/powerpc64/power8/Makefile | 5 + .../powerpc/powerpc64/power8/chacha20-ppc.c | 236 ++++++++ .../powerpc/powerpc64/power8/chacha20_arch.h | 37 ++ sysdeps/s390/s390-64/Makefile | 4 + sysdeps/s390/s390-64/chacha20-vx.S | 564 ++++++++++++++++++ sysdeps/s390/s390-64/chacha20_arch.h | 45 ++ sysdeps/unix/sysv/linux/aarch64/libc.abilist | 3 + sysdeps/unix/sysv/linux/alpha/libc.abilist | 3 + sysdeps/unix/sysv/linux/arc/libc.abilist | 3 + sysdeps/unix/sysv/linux/arm/be/libc.abilist | 3 + sysdeps/unix/sysv/linux/arm/le/libc.abilist | 3 + sysdeps/unix/sysv/linux/csky/libc.abilist | 3 + sysdeps/unix/sysv/linux/hppa/libc.abilist | 3 + sysdeps/unix/sysv/linux/i386/libc.abilist | 3 + sysdeps/unix/sysv/linux/ia64/libc.abilist | 3 + .../sysv/linux/m68k/coldfire/libc.abilist | 3 + .../unix/sysv/linux/m68k/m680x0/libc.abilist | 3 + .../sysv/linux/microblaze/be/libc.abilist | 3 + .../sysv/linux/microblaze/le/libc.abilist | 3 + .../sysv/linux/mips/mips32/fpu/libc.abilist | 3 + .../sysv/linux/mips/mips32/nofpu/libc.abilist | 3 + .../sysv/linux/mips/mips64/n32/libc.abilist | 3 + .../sysv/linux/mips/mips64/n64/libc.abilist | 3 + sysdeps/unix/sysv/linux/nios2/libc.abilist | 3 + sysdeps/unix/sysv/linux/not-cancel.h | 7 + sysdeps/unix/sysv/linux/or1k/libc.abilist | 3 + .../linux/powerpc/powerpc32/fpu/libc.abilist | 3 + .../powerpc/powerpc32/nofpu/libc.abilist | 3 + .../linux/powerpc/powerpc64/be/libc.abilist | 3 + .../linux/powerpc/powerpc64/le/libc.abilist | 3 + .../unix/sysv/linux/riscv/rv32/libc.abilist | 3 + .../unix/sysv/linux/riscv/rv64/libc.abilist | 3 + .../unix/sysv/linux/s390/s390-32/libc.abilist | 3 + .../unix/sysv/linux/s390/s390-64/libc.abilist | 3 + sysdeps/unix/sysv/linux/sh/be/libc.abilist | 3 + sysdeps/unix/sysv/linux/sh/le/libc.abilist | 3 + .../sysv/linux/sparc/sparc32/libc.abilist | 3 + .../sysv/linux/sparc/sparc64/libc.abilist | 3 + sysdeps/unix/sysv/linux/tls-internal.c | 33 +- sysdeps/unix/sysv/linux/tls-internal.h | 20 +- .../unix/sysv/linux/x86_64/64/libc.abilist | 3 + .../unix/sysv/linux/x86_64/x32/libc.abilist | 3 + sysdeps/x86_64/Makefile | 7 + sysdeps/x86_64/chacha20-avx2.S | 313 ++++++++++ sysdeps/x86_64/chacha20-sse2.S | 311 ++++++++++ sysdeps/x86_64/chacha20_arch.h | 48 ++ 80 files changed, 3942 insertions(+), 17 deletions(-) create mode 100644 benchtests/bench-arc4random.c create mode 100644 stdlib/arc4random.c create mode 100644 stdlib/arc4random.h create mode 100644 stdlib/arc4random_uniform.c create mode 100644 stdlib/chacha20.c create mode 100644 stdlib/tst-arc4random-chacha20.c create mode 100644 stdlib/tst-arc4random-fork.c create mode 100644 stdlib/tst-arc4random-stats.c create mode 100644 stdlib/tst-arc4random-thread.c create mode 100644 sysdeps/aarch64/chacha20-neon.S create mode 100644 sysdeps/aarch64/chacha20_arch.h create mode 100644 sysdeps/generic/chacha20_arch.h create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/Makefile create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/chacha20-ppc.c create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/chacha20_arch.h create mode 100644 sysdeps/powerpc/powerpc64/power8/chacha20-ppc.c create mode 100644 sysdeps/powerpc/powerpc64/power8/chacha20_arch.h create mode 100644 sysdeps/s390/s390-64/chacha20-vx.S create mode 100644 sysdeps/s390/s390-64/chacha20_arch.h create mode 100644 sysdeps/x86_64/chacha20-avx2.S create mode 100644 sysdeps/x86_64/chacha20-sse2.S create mode 100644 sysdeps/x86_64/chacha20_arch.h