From patchwork Mon Apr 25 13:01:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 53175 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 35D1F3857C4D for ; Mon, 25 Apr 2022 13:02:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 35D1F3857C4D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1650891748; bh=QJovUI46dkDbYsu4ERMyPf8zG7coRrRFWwbGjlRM+q4=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=vfdVis7E8o4jXo9s0qmrw/n0aTsu0JFjjlPZcBO84NDBtMoz8p7qzNVdh5tclkzAG ifAZW+UGrrCFYTgNrk5EFeX4ZJHjBGIOYbbSB43MY6PNjrfSshzrivlibbPVpwFHEr n4npXTAp5ydIGwTjgR3NL7bf+uIFx77FON/K+l5E= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-ot1-x332.google.com (mail-ot1-x332.google.com [IPv6:2607:f8b0:4864:20::332]) by sourceware.org (Postfix) with ESMTPS id EC1AE3858D28 for ; Mon, 25 Apr 2022 13:02:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EC1AE3858D28 Received: by mail-ot1-x332.google.com with SMTP id k29-20020a056830243d00b006040caa0988so10716919ots.6 for ; Mon, 25 Apr 2022 06:02:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=QJovUI46dkDbYsu4ERMyPf8zG7coRrRFWwbGjlRM+q4=; b=sPfRx9ngLl0zUy9pWtkZ5uEqIXTCC/irLrG8Cld2D093kwWUmVptSSlHGJuv4alZPJ Zm5Yri2B7zsxFiNgEp8Jsye+t4WdTymynolH4vzIYPeYFkifnVO2DemizfzN4ezS2pwN CmwY5R44naCQp7lsgBrW0bl2QYoBHjwBJ+9dRA/78XI6vi6pkWg0EocR2l8zRTlQVugl //SWHxRP4qrj1Djno6bbPTjvZCC7jRWKDYST+SHzyItZhlYwq8LT7HulQ9txI5QMe6Ww HFR0E2AL1HmdF1CyFQ4ZamuZtHcpPPgXJ64cYNZLYd1SOdLXZxvxdMlRh4sf8fS0eVC6 YSUw== X-Gm-Message-State: AOAM5305apPBywYeh1yIQ9J33inbH60nKQAtWsbXQUoYmZiN5e21WWSw kzI5+pm/lMnafAUlb86g5NwfAD4pDtKQtw== X-Google-Smtp-Source: ABdhPJwT834lOQzlTJBoio2WxzfwoTun+TpE5hGlaGCMTJpy2YkrtV6zuW2UBWGDNsFZhDtNJxmXlw== X-Received: by 2002:a9d:70d5:0:b0:605:63c1:c97c with SMTP id w21-20020a9d70d5000000b0060563c1c97cmr6353619otj.379.1650891721463; Mon, 25 Apr 2022 06:02:01 -0700 (PDT) Received: from birita.. ([2804:431:c7ca:4214:b4dd:3339:98d6:1ec0]) by smtp.gmail.com with ESMTPSA id e4-20020a0568301e4400b006054dca5442sm3804278otj.28.2022.04.25.06.01.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Apr 2022 06:02:00 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH v4 0/9] Add arc4random support Date: Mon, 25 Apr 2022 10:01:47 -0300 Message-Id: <20220425130156.1062525-1-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Adhemerval Zanella via Libc-alpha From: Adhemerval Zanella Reply-To: Adhemerval Zanella Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This patch adds the arc4random, arc4random_buf, and arc4random_uniform along with optimized versions for x86_64, aarch64, powerpc64, and s390x. The generic implementation is based on scalar Chacha20, with a per thread state cache allocated in TCB. The internal state keeps a 256 bytes buffer (8 ChaCha20 blocks) plus the cipher state, which allows to better use the vectorized optimized version. It would be possible to use just 128 bytes, but it would require to rewrite the AVX2 optimization (and possible it would lower performance slight). The initial state and reseed uses getrandom or /dev/urandom as fallback and reseeds the internal state on every 16MB of consumed entropy. There is no fork detection, the internal state is reset only at the atfork handler. It does not handle direct clone calls, nor vfork or _Fork. Although it is lock-free, arc4random is still not async-signal-safe (the per thread state is not updated atomically). The generic ChaCha20 implementation is based on the RFC8439 [1] without the last XOR step. Since the input stream will either zero bytes (initial state) or the PRNG output itself this step does not add any extra entropy. The optimized ChaCha20 implementations for x86_64, aarch64, powerpc64, and s390x use vectorized instruction and they are based on libgcrypt code. ChaCha20 is used because is the standard cipher used on different arc4random implementation (BSDs, MacOSX), and recently on Linux random subsystem. It also offers a very cheap rekey, which uses periodically uses kernel entropy to improve randomness; it is also simpler than AES, and shows better performance when no specialized instructions are present. [1] https://sourceware.org/pipermail/libc-alpha/2018-June/094879.html v4: * Fixed typos and expanded comments. * Fixed powerpc multi-arch organization. v3: * Add per-thread cache to remove the lock usage. It should improve both performance and scalability. * Improve benchmark precision. * Fixed Hurd test build. v2: * Removed the last XOR operation on ChaCha20 implementation (it does not much on arc4random usage). * Add tst-arc4random-chacha20.c and refactor to check against the expected implementation. * Fixed aarch64 implementation (a last change to move symbols to hidden did not change the relocation to use it as well). * Refactor x86 SSSE3 to SSE2. * Fixed powerpc64 implementation on BE (use the correct macro to check for endianess instead the ones from libgcrpyt). * Add s390x optimized ChaCha20 implementation. Adhemerval Zanella (9): stdlib: Add arc4random, arc4random_buf, and arc4random_uniform (BZ #4417) stdlib: Add arc4random tests benchtests: Add arc4random benchtest aarch64: Add optimized chacha20 x86: Add SSE2 optimized chacha20 x86: Add AVX2 optimized chacha20 powerpc64: Add optimized chacha20 s390x: Add optimized chacha20 stdlib: Add TLS optimization to arc4random LICENSES | 22 + NEWS | 4 +- benchtests/Makefile | 6 +- benchtests/bench-arc4random.c | 224 +++++++ include/stdlib.h | 13 + nptl/allocatestack.c | 5 +- posix/fork.c | 2 + stdlib/Makefile | 9 + stdlib/Versions | 5 + stdlib/arc4random.c | 176 ++++++ stdlib/arc4random.h | 45 ++ stdlib/arc4random_uniform.c | 140 +++++ stdlib/chacha20.c | 166 ++++++ stdlib/stdlib.h | 14 + stdlib/tst-arc4random-chacha20.c | 166 ++++++ stdlib/tst-arc4random-fork.c | 174 ++++++ stdlib/tst-arc4random-stats.c | 146 +++++ stdlib/tst-arc4random-thread.c | 278 +++++++++ sysdeps/aarch64/Makefile | 4 + sysdeps/aarch64/chacha20-neon.S | 323 ++++++++++ sysdeps/aarch64/chacha20_arch.h | 40 ++ sysdeps/generic/chacha20_arch.h | 24 + sysdeps/generic/not-cancel.h | 2 + sysdeps/generic/tls-internal-struct.h | 3 + sysdeps/mach/hurd/i386/libc.abilist | 3 + sysdeps/mach/hurd/not-cancel.h | 3 + .../powerpc/powerpc64/be/multiarch/Makefile | 4 + .../powerpc64/be/multiarch/chacha20-ppc.c | 1 + .../powerpc64/be/multiarch/chacha20_arch.h | 42 ++ sysdeps/powerpc/powerpc64/power8/Makefile | 5 + .../powerpc/powerpc64/power8/chacha20-ppc.c | 236 ++++++++ .../powerpc/powerpc64/power8/chacha20_arch.h | 37 ++ sysdeps/s390/s390-64/Makefile | 4 + sysdeps/s390/s390-64/chacha20-vx.S | 564 ++++++++++++++++++ sysdeps/s390/s390-64/chacha20_arch.h | 45 ++ sysdeps/unix/sysv/linux/aarch64/libc.abilist | 3 + sysdeps/unix/sysv/linux/alpha/libc.abilist | 3 + sysdeps/unix/sysv/linux/arc/libc.abilist | 3 + sysdeps/unix/sysv/linux/arm/be/libc.abilist | 3 + sysdeps/unix/sysv/linux/arm/le/libc.abilist | 3 + sysdeps/unix/sysv/linux/csky/libc.abilist | 3 + sysdeps/unix/sysv/linux/hppa/libc.abilist | 3 + sysdeps/unix/sysv/linux/i386/libc.abilist | 3 + sysdeps/unix/sysv/linux/ia64/libc.abilist | 3 + .../sysv/linux/m68k/coldfire/libc.abilist | 3 + .../unix/sysv/linux/m68k/m680x0/libc.abilist | 3 + .../sysv/linux/microblaze/be/libc.abilist | 3 + .../sysv/linux/microblaze/le/libc.abilist | 3 + .../sysv/linux/mips/mips32/fpu/libc.abilist | 3 + .../sysv/linux/mips/mips32/nofpu/libc.abilist | 3 + .../sysv/linux/mips/mips64/n32/libc.abilist | 3 + .../sysv/linux/mips/mips64/n64/libc.abilist | 3 + sysdeps/unix/sysv/linux/nios2/libc.abilist | 3 + sysdeps/unix/sysv/linux/not-cancel.h | 7 + sysdeps/unix/sysv/linux/or1k/libc.abilist | 3 + .../linux/powerpc/powerpc32/fpu/libc.abilist | 3 + .../powerpc/powerpc32/nofpu/libc.abilist | 3 + .../linux/powerpc/powerpc64/be/libc.abilist | 3 + .../linux/powerpc/powerpc64/le/libc.abilist | 3 + .../unix/sysv/linux/riscv/rv32/libc.abilist | 3 + .../unix/sysv/linux/riscv/rv64/libc.abilist | 3 + .../unix/sysv/linux/s390/s390-32/libc.abilist | 3 + .../unix/sysv/linux/s390/s390-64/libc.abilist | 3 + sysdeps/unix/sysv/linux/sh/be/libc.abilist | 3 + sysdeps/unix/sysv/linux/sh/le/libc.abilist | 3 + .../sysv/linux/sparc/sparc32/libc.abilist | 3 + .../sysv/linux/sparc/sparc64/libc.abilist | 3 + sysdeps/unix/sysv/linux/tls-internal.h | 22 +- .../unix/sysv/linux/x86_64/64/libc.abilist | 3 + .../unix/sysv/linux/x86_64/x32/libc.abilist | 3 + sysdeps/x86_64/Makefile | 7 + sysdeps/x86_64/chacha20-avx2.S | 313 ++++++++++ sysdeps/x86_64/chacha20-sse2.S | 311 ++++++++++ sysdeps/x86_64/chacha20_arch.h | 48 ++ 74 files changed, 3737 insertions(+), 5 deletions(-) create mode 100644 benchtests/bench-arc4random.c create mode 100644 stdlib/arc4random.c create mode 100644 stdlib/arc4random.h create mode 100644 stdlib/arc4random_uniform.c create mode 100644 stdlib/chacha20.c create mode 100644 stdlib/tst-arc4random-chacha20.c create mode 100644 stdlib/tst-arc4random-fork.c create mode 100644 stdlib/tst-arc4random-stats.c create mode 100644 stdlib/tst-arc4random-thread.c create mode 100644 sysdeps/aarch64/chacha20-neon.S create mode 100644 sysdeps/aarch64/chacha20_arch.h create mode 100644 sysdeps/generic/chacha20_arch.h create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/Makefile create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/chacha20-ppc.c create mode 100644 sysdeps/powerpc/powerpc64/be/multiarch/chacha20_arch.h create mode 100644 sysdeps/powerpc/powerpc64/power8/chacha20-ppc.c create mode 100644 sysdeps/powerpc/powerpc64/power8/chacha20_arch.h create mode 100644 sysdeps/s390/s390-64/chacha20-vx.S create mode 100644 sysdeps/s390/s390-64/chacha20_arch.h create mode 100644 sysdeps/x86_64/chacha20-avx2.S create mode 100644 sysdeps/x86_64/chacha20-sse2.S create mode 100644 sysdeps/x86_64/chacha20_arch.h