From patchwork Tue Nov 23 17:40:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 48033 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 51EA13858425 for ; Tue, 23 Nov 2021 18:13:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 51EA13858425 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1637691206; bh=lmSDfpe3fPK/9SWpdDFV4ND8SdfLkFGuFnkVpMfc5vE=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=dQaHXqqWzTFa8Rpd+CQIdIbflr7ZsLZwLELEhBN+OKIXSgH0zNXai0HuEOi5e08Uu kkO5D1+rnTNIGwLdLaWO9XWzU43ASbGh55q6JfKCE7cAD9NCQMLkg+BT1vq/bOjWZd VByL6qGFhse2U9HZDfE1iKYkGBnT7y41CKZ94WY0= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 9A79C3858D28 for ; Tue, 23 Nov 2021 18:12:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9A79C3858D28 X-IronPort-AV: E=McAfee;i="6200,9189,10177"; a="298495380" X-IronPort-AV: E=Sophos;i="5.87,258,1631602800"; d="scan'208";a="298495380" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Nov 2021 09:40:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,258,1631602800"; d="scan'208";a="538335460" Received: from scymds02.sc.intel.com ([10.82.73.244]) by orsmga001.jf.intel.com with ESMTP; 23 Nov 2021 09:40:10 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds02.sc.intel.com with ESMTP id 1ANHe9W8022223; Tue, 23 Nov 2021 09:40:10 -0800 To: libc-alpha@sourceware.org Subject: [PATCH v4 0/5] Add vector math functions to microbenchmark Date: Tue, 23 Nov 2021 09:40:04 -0800 Message-Id: <20211123174009.229783-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Cc: andrey.kolesov@intel.com Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" Add vector math function cos, cosf, exp, expf, log, logf, pow, powf sin and sinf to libmvec microbenchmark. Input data set generated as follows. libmvec-cos-inputs: 90% Normal random distribution range: (-DBL_MAX, DBL_MAX) mean: 0.0 sigma: 5.0 10% uniform random distribution in range (-1000.0, 1000.0) libmvec-cosf-inputs: 90% Normal random distribution range: (-FLT_MAX, FLT_MAX) mean: 0.0f sigma: 5.0f 10% uniform random distribution in range (-1000.0f, 1000.0f) libmvec-exp-inputs: 90% Normal random distribution range: (-708.0, 709.0) mean: 0.0 sigma: 16.0 10% uniform random distribution in range (-500.0, 500.0) libmvec-expf-inputs: 90% Normal random distribution range: (-87.0f, 88.0f) mean: 0.0f sigma: 8.0f 10% uniform random distribution in range (-50.0f, 50.0f) libmvec-log-inputs: 70% Normal random distribution range: (0.0, DBL_MAX) mean: 1.0 sigma: 50.0 30% uniform random distribution in range (0.0, DBL_MAX) libmvec-logf-inputs: 70% Normal random distribution range: (0.0f, FLT_MAX) mean: 1.0f sigma: 50.0f 30% uniform random distribution in range (0.0f, FLT_MAX) libmvec-pow-inputs: arg1: 90% Normal random distribution range: (0.0, 256.0) mean: 0.0 sigma: 32.0 10% uniform random distribution in range (0.0, 256.0) arg2: 90% Normal random distribution range: (-127.0, 127.0) mean: 0.0 sigma: 16.0 10% uniform random distribution in range (-127.0, 127.0) libmvec-powf-inputs: arg1: 90% Normal random distribution range: (0.0f, 100.0f) mean: 0.0f sigma: 16.0f 10% uniform random distribution in range (0.0f, 100.0f) arg2: 90% Normal random distribution range: (-10.0f, 10.0f) mean: 0.0f sigma: 8.0f 10% uniform random distribution in range (-10.0f, 10.0f) libmvec-sin-inputs: 90% Normal random distribution range: (-DBL_MAX, DBL_MAX) mean: 0.0 sigma: 5.0 10% uniform random distribution in range (-1000.0, 1000.0) libmvec-sinf-inputs: 90% Normal random distribution range: (-FLT_MAX, FLT_MAX) mean: 0.0f sigma: 5.0f 10% uniform random distribution in range (-1000.0f, 1000.0f) Sunil K Pandey (5): x86-64: Add vector cos/cosf to libmvec microbenchmark x86-64: Add vector exp/expf to libmvec microbenchmark x86-64: Add vector log/logf to libmvec microbenchmark x86-64: Add vector pow/powf to libmvec microbenchmark x86-64: Add vector sin/sinf to libmvec microbenchmark sysdeps/x86_64/fpu/Makeconfig | 5 + sysdeps/x86_64/fpu/libmvec-cos-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cosf-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-expf-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-logf-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-pow-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-powf-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sin-inputs | 4100 ++++++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinf-inputs | 4100 ++++++++++++++++++++++++ 11 files changed, 41005 insertions(+) create mode 100644 sysdeps/x86_64/fpu/libmvec-cos-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cosf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-expf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-logf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-pow-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-powf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sin-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinf-inputs