From patchwork Thu Oct 20 09:32:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59145 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 979B1395C045 for ; Thu, 20 Oct 2022 09:36:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 979B1395C045 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258608; bh=+O/2Nf3yFN+IfPKXi+OoTC8HAxlnanxuy/DRnN1lGKA=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZhbTjStoylJ0kLmUcByzPbMT2TkH0uMws7yz40wHc6Xa8Q6Zo1NXd4YGEWbzE8n3r vHkksaUjbsKRRdTp20qRwlXUpdbmHIEOYlyne8dAfLLAyuLvR334N29ULDOwVPv5Um i45TM3yb4H4C/ESeG1DD1GmQ1HGq0ouf9vm/SL04= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E359E38207CD for ; Thu, 20 Oct 2022 09:35:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E359E38207CD Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 2B98F300089; Thu, 20 Oct 2022 09:35:21 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 14/40] sim/frv: Add explicit casts Date: Thu, 20 Oct 2022 09:32:19 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the FR-V instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/frv/decode.c b/sim/frv/decode.c index 307b593e148..9c4a97833ad 100644 --- a/sim/frv/decode.c +++ b/sim/frv/decode.c @@ -39,12 +39,12 @@ static IDESC frvbf_insn_data[FRVBF_INSN__MAX]; static const struct insn_sem frvbf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD }, { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD }, { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD }, @@ -792,7 +792,7 @@ static const struct insn_sem frvbf_insn_sem[] = static const struct insn_sem frvbf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */