From patchwork Fri May 6 09:34:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Clifton X-Patchwork-Id: 12073 Received: (qmail 110481 invoked by alias); 6 May 2016 09:34:24 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 110464 invoked by uid 89); 6 May 2016 09:34:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.0 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=emulated, Hx-languages-length:2236, 95 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 06 May 2016 09:34:23 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2A0C03B752 for ; Fri, 6 May 2016 09:34:22 +0000 (UTC) Received: from littlehelper.redhat.com (vpn1-6-246.ams2.redhat.com [10.36.6.246]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u469YKgD014601 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO) for ; Fri, 6 May 2016 05:34:21 -0400 From: Nick Clifton To: gdb-patches@sourceware.org Subject: Commit: AArch64 sim: Add support for FMLA by element Date: Fri, 06 May 2016 10:34:19 +0100 Message-ID: <87shxv5y3o.fsf@redhat.com> MIME-Version: 1.0 Hi Guys, I am applying the patch below to add support for the FMLA (by element) instruction to the AArch64 simulator. Cheers Nick sim/aarch64/ChangeLog 2016-05-06 Nick Clifton * simulator.c (do_FMLA_by_element): New function. (do_vec_op2): Call it. diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c index 2441cce..88cb03d 100644 --- a/sim/aarch64/simulator.c +++ b/sim/aarch64/simulator.c @@ -6034,6 +6034,67 @@ do_vec_MUL_by_element (sim_cpu *cpu) } static void +do_FMLA_by_element (sim_cpu *cpu) +{ + /* instr[31] = 0 + instr[30] = half/full + instr[29,23] = 00 1111 1 + instr[22] = size + instr[21] = L + instr[20,16] = m + instr[15,12] = 0001 + instr[11] = H + instr[10] = 0 + instr[9,5] = Vn + instr[4,0] = Vd */ + + unsigned full = INSTR (30, 30); + unsigned size = INSTR (22, 22); + unsigned L = INSTR (21, 21); + unsigned vm = INSTR (20, 16); + unsigned H = INSTR (11, 11); + unsigned vn = INSTR (9, 5); + unsigned vd = INSTR (4, 0); + unsigned e; + + NYI_assert (29, 23, 0x1F); + NYI_assert (15, 12, 0x1); + NYI_assert (10, 10, 0); + + TRACE_DECODE (cpu, "emulated at line %d", __LINE__); + if (size) + { + double element1, element2; + + if (! full || L) + HALT_UNALLOC; + + element2 = aarch64_get_vec_double (cpu, vm, H); + + for (e = 0; e < 2; e++) + { + element1 = aarch64_get_vec_double (cpu, vn, e); + element1 *= element2; + element1 += aarch64_get_vec_double (cpu, vd, e); + aarch64_set_vec_double (cpu, vd, e, element1); + } + } + else + { + float element1; + float element2 = aarch64_get_vec_float (cpu, vm, (H << 1) | L); + + for (e = 0; e < (full ? 4 : 2); e++) + { + element1 = aarch64_get_vec_float (cpu, vn, e); + element1 *= element2; + element1 += aarch64_get_vec_float (cpu, vd, e); + aarch64_set_vec_float (cpu, vd, e, element1); + } + } +} + +static void do_vec_op2 (sim_cpu *cpu) { /* instr[31] = 0 @@ -6051,9 +6112,18 @@ do_vec_op2 (sim_cpu *cpu) { switch (INSTR (15, 10)) { + case 0x04: + case 0x06: + do_FMLA_by_element (cpu); + return; + case 0x20: - case 0x22: do_vec_MUL_by_element (cpu); return; - default: HALT_NYI; + case 0x22: + do_vec_MUL_by_element (cpu); + return; + + default: + HALT_NYI; } } else