From patchwork Thu Dec 18 21:01:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 4349 Received: (qmail 21399 invoked by alias); 18 Dec 2014 21:02:15 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 21385 invoked by uid 89); 18 Dec 2014 21:02:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f52.google.com Received: from mail-pa0-f52.google.com (HELO mail-pa0-f52.google.com) (209.85.220.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 18 Dec 2014 21:02:12 +0000 Received: by mail-pa0-f52.google.com with SMTP id eu11so2137702pac.39 for ; Thu, 18 Dec 2014 13:02:11 -0800 (PST) X-Received: by 10.66.179.7 with SMTP id dc7mr6858316pac.24.1418936531001; Thu, 18 Dec 2014 13:02:11 -0800 (PST) Received: from [192.168.1.101] ([223.72.65.4]) by mx.google.com with ESMTPSA id am14sm7648923pac.35.2014.12.18.13.02.08 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 18 Dec 2014 13:02:09 -0800 (PST) Message-ID: <549340C3.1070107@gmail.com> Date: Fri, 19 Dec 2014 05:01:55 +0800 From: Chen Gang User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130625 Thunderbird/17.0.7 MIME-Version: 1.0 To: Joel Brobecker , Andreas Schwab CC: gdb-patches@sourceware.org Subject: [PATCH v5] gdb/hppa-tdep.c: Fix logical working flow issues and check additional store instructions Original working flow has several issues: - typo issue: "(inst >> 26) == 0x1f && ..." for checking 'stw(m)'. - compiler warning: "(inst >> 6) & 0xf) == 0x9" for checking 'sth'. - "(inst >> 6) == 0xa" needs to be "((inst >> 6) & 0xf) == 0xa". And also need check additional store instructions: - For absolute memory: 'stby', 'stdby'. - For unaligned: 'stwa', 'stda'. The original code also can be improved: - Remove redundant double check "(inst >> 26) == 0x1b" for 'stwm'. - Use 2 'switch' statements instead of all 'if' statements. 2014-12-19 Chen Gang * hppa-tdep.c (inst_saves_gr): Fix logical working flow issues and check additional store instructions. --- gdb/hppa-tdep.c | 121 ++++++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 95 insertions(+), 26 deletions(-) diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c index 627f31a..4cae7b2 100644 --- a/gdb/hppa-tdep.c +++ b/gdb/hppa-tdep.c @@ -1376,37 +1376,106 @@ is_branch (unsigned long inst) } /* Return the register number for a GR which is saved by INST or - zero it INST does not save a GR. */ + zero if INST does not save a GR. -static int -inst_saves_gr (unsigned long inst) -{ - /* Does it look like a stw? */ - if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b - || (inst >> 26) == 0x1f - || ((inst >> 26) == 0x1f - && ((inst >> 6) == 0xa))) - return hppa_extract_5R_store (inst); + Referenced from: - /* Does it look like a std? */ - if ((inst >> 26) == 0x1c - || ((inst >> 26) == 0x03 - && ((inst >> 6) & 0xf) == 0xb)) - return hppa_extract_5R_store (inst); + parisc 1.1: + https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf - /* Does it look like a stwm? GCC & HPC may use this in prologues. */ - if ((inst >> 26) == 0x1b) - return hppa_extract_5R_store (inst); + parisc 2.0: + https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf - /* Does it look like sth or stb? HPC versions 9.0 and later use these - too. */ - if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18 - || ((inst >> 26) == 0x3 - && (((inst >> 6) & 0xf) == 0x8 - || (inst >> 6) & 0xf) == 0x9)) - return hppa_extract_5R_store (inst); + According to Table 6-5 of Chapter 6 (Memory Reference Instructions) + on page 106 in parisc 2.0, all instructions for storing values from + the general registers are: - return 0; + Store: stb, sth, stw, std (according to Chapter 7, they + are only in both "inst >> 26" and "inst >> 6". + Store Absolute: stwa, stda (according to Chapter 7, they are only + in "inst >> 6". + Store Bytes: stby, stdby (according to Chapter 7, they are + only in "inst >> 6"). + + For (inst >> 26), according to Chapter 7: + + The effective memory reference address is formed by the addition + of an immediate displacement to a base value. + + - stb: 0x18, store a byte from a general register. + + - sth: 0x19, store a halfword from a general register. + + - stw: 0x1a, store a word from a general register. + + - stwm: 0x1b, store a word from a general register and perform base + register modification (2.0 will still treate it as stw). + + - std: 0x1c, store a doubleword from a general register (2.0 only). + + - stw: 0x1f, store a word from a general register (2.0 only). + + For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7: + + The effective memory reference address is formed by the addition + of an index value to a base value specified in the instruction. + + - stb: 0x08, store a byte from a general register (1.1 calls stbs). + + - sth: 0x09, store a halfword from a general register (1.1 calls + sths). + + - stw: 0x0a, store a word from a general register (1.1 calls stws). + + - std: 0x0b: store a doubleword from a general register (2.0 only) + + Implement fast byte moves (stores) to unaligned word or doubleword + destination. + + - stby: 0x0c, for unaligned word (1.1 calls stbys). + + - stdby: 0x0d for unaligned doubleword (2.0 only). + + Store a word or doubleword using an absolute memory address formed + using short or long displacement or indexed + + - stwa: 0x0e, store a word from a general register to an absolute + address (1.0 calls stwas). + + - stda: 0x0f, store a doubleword from a general register to an + absolute address (2.0 only). */ + +static int +inst_saves_gr (unsigned long inst) +{ + switch ((inst >> 26) & 0x0f) + { + case 0x03: + switch ((inst >> 6) & 0x0f) + { + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + return hppa_extract_5R_store (inst); + default: + return 0; + } + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + case 0x1c: + /* no 0x1d or 0x1e -- according to parisc 2.0 document */ + case 0x1f: + return hppa_extract_5R_store (inst); + default: + return 0; + } } /* Return the register number for a FR which is saved by INST or