diff mbox series

[13/40] sim/frv: Initialize some variables

Message ID 51a03f7097921cc48954210cf99e370ae8982ec8.1666258361.git.research_trasio@irq.a4lg.com
State Committed
Headers
Series sim+gdb: Suppress warnings if built with Clang (big batch 1) |

Commit Message

Tsukasa OI Oct. 20, 2022, 9:32 a.m. UTC 
  This commit is strongly related to "cpu/frv: Initialize some variables" and
applies corresponding changes to sim/frv/sem.c.

Note:
This commit touches CGEN-generated files directly.
Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best
way to prevent this issue from happening again but there is another known
regression in CGEN to resolve.
---
 sim/frv/sem.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Mike Frysinger Oct. 23, 2022, 2:34 p.m. UTC | #1 
once an FRV person approves the cpu/ stuff, this looks fine
-mike
diff mbox series

Patch

diff --git a/sim/frv/sem.c b/sim/frv/sem.c
index cc7cbeee318..28610f4eac7 100644
--- a/sim/frv/sem.c
+++ b/sim/frv/sem.c
@@ -3054,6 +3054,7 @@  SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   QI tmp_cc;
+  tmp_cc = 0;
 if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) {
   tmp_cc = ANDQI (tmp_cc, 7);
 } else {
@@ -4545,6 +4546,7 @@  SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -4591,6 +4593,7 @@  SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (tmp_do_op) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -6706,6 +6709,7 @@  SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));