diff mbox series

[21/40] sim/m32r: Declare all required functions

Message ID	4a4ba144b84972f5b244be4d6e0900fbaae8c62f.1666258361.git.research_trasio@irq.a4lg.com
State	Committed
Headers	DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7E292395A03A To: Tsukasa OI <research_trasio@irq.a4lg.com>, Andrew Burgess <aburgess@redhat.com>, Mike Frysinger <vapier@gentoo.org>, Nick Clifton <nickc@redhat.com> Subject: [PATCH 21/40] sim/m32r: Declare all required functions Date: Thu, 20 Oct 2022 09:32:26 +0000 Message-Id: <4a4ba144b84972f5b244be4d6e0900fbaae8c62f.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1666258361.git.research_trasio@irq.a4lg.com> References: <cover.1666258361.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Tsukasa OI via Gdb-patches <gdb-patches@sourceware.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" <gdb-patches-bounces+patchwork=sourceware.org@sourceware.org>
Series	sim+gdb: Suppress warnings if built with Clang (big batch 1) \| [00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) [01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib [02/40] sim: Check known getrusage declaration existence [03/40] sim/aarch64: Remove unused functions [04/40] cpu/cris: Initialize some variables on CRIS CPU [05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 [06/40] sim/cris: Move declarations of f_specific_init [07/40] sim/cris: Regenerate with CGEN [08/40] sim/erc32: Insert void parameter [09/40] sim/erc32: Use int32_t as event callback argument [10/40] sim/erc32: Use int32_t as IRQ callback argument [11/40] cpu/frv: Initialize some variables [12/40] sim/frv: Initialize nesr variable [13/40] sim/frv: Initialize some variables [14/40] sim/frv: Add explicit casts [15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments [16/40] sim/lm32: fix some missing function declaration warnings [17/40] sim/lm32: Add explicit casts [19/40] sim/m32r: Initialize "list" variable [20/40] sim/m32r: Prepare required functions [21/40] sim/m32r: Declare all required functions [22/40] sim/m32r: Fixes to Linux emulator [23/40] sim/m32r: Add explicit casts [24/40] sim/mips: Fix enum type-related issues on cp1.c [25/40] sim/mn10300: Add an explicit cast [26/40] sim/ppc: Remove getrusage declarations if possible [27/40] sim/ppc: Add extra parenthesis to avoid ambiguity [28/40] sim/ppc: Initialize stat type buffer [29/40] sim/ppc: Fix indentation on generated code [30/40] sim/ppc: Use TRACE with initialized entry_point [31/40] sim/ppc: Initialize help variables [32/40] sim/ppc: Add an explicit cast [33/40] sim/ppc: Initialize reg and control_nr [34/40] sim/rx: Mark unused function [35/40] sim/sh: Initialize some variables [36/40] sim/sh: Use fabs instead of abs [37/40] sim/sh: Remove redundant function declaration [38/40] sim/bpf: Add explicit casts [39/40] sim/iq2000: Add explicit casts [40/40] sim/or1k: Add explicit casts

Commit Message

Tsukasa OI Oct. 20, 2022, 9:32 a.m. UTC

  This commit declares all required functions in m32r-sim.h.  They should be
defined in "cpu.h", "cpux.h" and "cpu2.h" but we currently cannot do that.

It also moves declarations of four functions out of two #ifndef blocks to
make those function available on all cases.
---
 sim/m32r/m32r-sim.h | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

Comments

Mike Frysinger Oct. 23, 2022, 2:54 p.m. UTC | #1

On 20 Oct 2022 09:32, Tsukasa OI wrote:
> This commit declares all required functions in m32r-sim.h.  They should be
> defined in "cpu.h", "cpux.h" and "cpu2.h" but we currently cannot do that.

the commit message needs to explain why it cannot be done correctly
-mike

diff mbox series

Patch

diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h
index 0c5103b0784..189be8868e1 100644
--- a/sim/m32r/m32r-sim.h
+++ b/sim/m32r/m32r-sim.h
@@ -42,9 +42,6 @@  extern int m32r_decode_gdb_ctrl_regnum (int);
 #define GET_H_SM() ((CPU (h_psw) & 0x80) != 0)
 
 #ifndef GET_H_CR
-extern USI  m32rbf_h_cr_get_handler (SIM_CPU *, UINT);
-extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
-
 #define GET_H_CR(regno) \
   XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno))
 #define SET_H_CR(regno, val) \
@@ -52,9 +49,6 @@  extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
 #endif
 
 #ifndef  GET_H_PSW
-extern UQI  m32rbf_h_psw_get_handler (SIM_CPU *);
-extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
-
 #define GET_H_PSW() \
   XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu)
 #define SET_H_PSW(val) \
@@ -68,8 +62,26 @@  extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
 
    The correct solution is to fix the code in cgen/sim.scm to generate
    prototypes for each of the functions it generates.  */
+extern USI  m32rbf_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern USI  m32rxf_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern USI  m32r2f_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32r2f_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern UQI  m32rbf_h_psw_get_handler (SIM_CPU *);
+extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
+extern UQI  m32rxf_h_psw_get_handler (SIM_CPU *);
+extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI);
+extern UQI  m32r2f_h_psw_get_handler (SIM_CPU *);
+extern void m32r2f_h_psw_set_handler (SIM_CPU *, UQI);
 extern DI   m32rbf_h_accum_get_handler (SIM_CPU *);
 extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32rxf_h_accum_get_handler (SIM_CPU *);
+extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32r2f_h_accum_get_handler (SIM_CPU *);
+extern void m32r2f_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32rxf_h_accums_get_handler (SIM_CPU *, UINT);
+extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI);
 extern DI   m32r2f_h_accums_get_handler (SIM_CPU *, UINT);
 extern void m32r2f_h_accums_set_handler (SIM_CPU *, UINT, DI);