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Wed, 26 Apr 2017 10:38:51 +0000 Received: from AM3PR08MB0101.eurprd08.prod.outlook.com (10.160.211.19) by AM3PR08MB0102.eurprd08.prod.outlook.com (10.160.211.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1061.12; Wed, 26 Apr 2017 10:38:49 +0000 Received: from AM3PR08MB0101.eurprd08.prod.outlook.com ([fe80::c065:778f:9924:8660]) by AM3PR08MB0101.eurprd08.prod.outlook.com ([fe80::c065:778f:9924:8660%14]) with mapi id 15.01.1047.019; Wed, 26 Apr 2017 10:38:48 +0000 From: Alan Hayward To: Yao Qi CC: "gdb-patches@sourceware.org" , nd Subject: Re: [PATCH 2/11] Add IA64_MAX_REGISTER_SIZE Date: Wed, 26 Apr 2017 10:38:48 +0000 Message-ID: <498D342A-2994-4664-968D-F97A80C66059@arm.com> References: <8637dnqils.fsf@gmail.com> <90F5717F-8685-4C74-B2E4-7317AF228034@arm.com> <86pogivp7m.fsf@gmail.com> <0CAAE3E4-1860-40FF-895E-6C6A54A4EAB6@arm.com> <86vapsqxld.fsf@gmail.com> In-Reply-To: <86vapsqxld.fsf@gmail.com> authentication-results: gmail.com; dkim=none (message not signed) header.d=none; gmail.com; dmarc=none action=none header.from=arm.com; x-microsoft-exchange-diagnostics: 1; AM3PR08MB0102; 7:sN6kUNif5pT8R+PCFD2ttiQD+Eaq5tXX28FsyB6BYBYw5jG5REGf27eIieMDHnlOjh1maCKk7DFzxYGUy2ueZ1FaaYnajPk2m6vPAwrzzjqXGJ9PVK400krFokV3TUsf7EruiOHeHV/klNpaE4I+9NRfzwuG4MIonTCn9hulDbC6WN8ZFtTO5fWYVrB7G+9F9X4O2Hmfx4wdPKkT5lSqCnLFzx99ZOXPmB56JpnQEjkmAKmTfVwlsvdMtsy7QkkDq2NlgchRZXnSJWEDpgNdCWgKH8PNImWSNPuLBUpHJWUs+gskVRw96tgzDnULSzi16PpFeRQxWknQPz3pvHskDg== x-ms-office365-filtering-correlation-id: 38270b6b-9af8-45c6-ca01-08d48c906c83 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(2017030254075)(48565401081)(201703131423075)(201703031133081); SRVR:AM3PR08MB0102; nodisclaimer: True x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(180628864354917); x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(6040450)(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046)(93006095)(93001095)(6055026)(6041248)(20161123562025)(20161123555025)(20161123558100)(20161123564025)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(6072148); SRVR:AM3PR08MB0102; BCL:0; PCL:0; RULEID:; SRVR:AM3PR08MB0102; x-forefront-prvs: 0289B6431E x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6009001)(39840400002)(39860400002)(39450400003)(39850400002)(39410400002)(39400400002)(24454002)(377424004)(5250100002)(86362001)(575784001)(36756003)(33656002)(54906002)(6512007)(3846002)(5660300001)(99286003)(102836003)(6116002)(83716003)(82746002)(3280700002)(6506006)(6486002)(2950100002)(3660700001)(25786009)(93886004)(229853002)(39060400002)(38730400002)(110136004)(305945005)(7736002)(53546009)(1411001)(6916009)(54356999)(50986999)(6436002)(76176999)(8936002)(81166006)(8676002)(4326008)(66066001)(189998001)(6246003)(2900100001)(53936002)(2906002)(15760500002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM3PR08MB0102; H:AM3PR08MB0101.eurprd08.prod.outlook.com; FPR:; SPF:None; MLV:ovrnspm; PTR:InfoNoRecords; LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-ID: <74BAB636AA493643AB1B4EED75585F22@eurprd08.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Apr 2017 10:38:48.7866 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR08MB0102 > On 25 Apr 2017, at 17:08, Yao Qi wrote: > > Alan Hayward writes: > >> @@ -1516,8 +1519,7 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, >> else if (qp == 0 && rN == 2 >> && ((rM == fp_reg && fp_reg != 0) || rM == 12)) >> { >> - gdb_byte buf[MAX_REGISTER_SIZE]; >> - CORE_ADDR saved_sp = 0; >> + ULONGEST saved_sp = 0; > > Is it necessary to change the type of "saved_sp"? > >> @@ -2490,12 +2488,11 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, >> int write, void *arg) >> { >> int regnum = ia64_uw2gdb_regnum (uw_regnum); >> - unw_word_t bsp, sof, sol, cfm, psr, ip; >> + ULONGEST bsp, sof, cfm, psr, ip; > > Why do you change the type? > >> struct frame_info *this_frame = (struct frame_info *) arg; >> struct gdbarch *gdbarch = get_frame_arch (this_frame); >> enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); >> long new_sof, old_sof; >> - gdb_byte buf[MAX_REGISTER_SIZE]; >> >> /* We never call any libunwind routines that need to write registers. */ >> gdb_assert (!write); > >> @@ -2570,12 +2561,11 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, >> unw_word_t *val, int write, void *arg) >> { >> int regnum = ia64_uw2gdb_regnum (uw_regnum); >> - unw_word_t bsp, sof, sol, cfm, psr, ip; >> + ULONGEST bsp, sof, cfm, psr, ip; > > Likewise. > I thought it would be better for the type to match the read type. Reverted the types back to what they were. Updated patch below. Tested on a --enable-targets=all build with a faked libunwind setup using make check with board files unix and native-gdbserver. As mentioned previously, I do not have an IA64 machine to test on. Ok to commit? Alan. 2017-04-26 Alan Hayward * ia64-tdep.c (IA64_MAX_FP_REGISTER_SIZE) Add. (ia64_register_to_value): Use IA64_MAX_FP_REGISTER_SIZE. (ia64_value_to_register): Likewise. (examine_prologue): Use get_frame_register_unsigned. (ia64_sigtramp_frame_prev_register): Use extract_unsigned_integer. (ia64_access_reg): Likewise. (ia64_access_rse_reg): Likewise. (ia64_libunwind_frame_prev_register): Likewise. (ia64_extract_return_value): Use IA64_MAX_FP_REGISTER_SIZE. (ia64_store_return_value): Likewise. (ia64_push_dummy_call): Likewise. diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c index 22e158866bbbf0d9457737ac973027521e2c1655..4f19e15acdcf34816c10bcab6884659c6688f6bf 100644 --- a/gdb/ia64-tdep.c +++ b/gdb/ia64-tdep.c @@ -125,6 +125,9 @@ static CORE_ADDR ia64_find_global_pointer (struct gdbarch *gdbarch, #define NUM_IA64_RAW_REGS 462 +/* Big enough to hold a FP register in bytes. */ +#define IA64_FP_REGISTER_SIZE 16 + static int sp_regnum = IA64_GR12_REGNUM; /* NOTE: we treat the register stack registers r32-r127 as @@ -1227,7 +1230,7 @@ ia64_register_to_value (struct frame_info *frame, int regnum, int *optimizedp, int *unavailablep) { struct gdbarch *gdbarch = get_frame_arch (frame); - gdb_byte in[MAX_REGISTER_SIZE]; + gdb_byte in[IA64_FP_REGISTER_SIZE]; /* Convert to TYPE. */ if (!get_frame_register_bytes (frame, regnum, 0, @@ -1245,7 +1248,7 @@ ia64_value_to_register (struct frame_info *frame, int regnum, struct type *valtype, const gdb_byte *in) { struct gdbarch *gdbarch = get_frame_arch (frame); - gdb_byte out[MAX_REGISTER_SIZE]; + gdb_byte out[IA64_FP_REGISTER_SIZE]; convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch)); put_frame_register (frame, regnum, out); } @@ -1516,7 +1519,6 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, else if (qp == 0 && rN == 2 && ((rM == fp_reg && fp_reg != 0) || rM == 12)) { - gdb_byte buf[MAX_REGISTER_SIZE]; CORE_ADDR saved_sp = 0; /* adds r2, spilloffset, rFramePointer or @@ -1533,9 +1535,8 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, if (this_frame) { struct gdbarch *gdbarch = get_frame_arch (this_frame); - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - get_frame_register (this_frame, sp_regnum, buf); - saved_sp = extract_unsigned_integer (buf, 8, byte_order); + saved_sp = get_frame_register_unsigned (this_frame, + sp_regnum); } spill_addr = saved_sp + (rM == 12 ? 0 : mem_stack_frame_size) @@ -2289,10 +2290,6 @@ static struct value * ia64_sigtramp_frame_prev_register (struct frame_info *this_frame, void **this_cache, int regnum) { - gdb_byte buf[MAX_REGISTER_SIZE]; - - struct gdbarch *gdbarch = get_frame_arch (this_frame); - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct ia64_frame_cache *cache = ia64_sigtramp_frame_cache (this_frame, this_cache); @@ -2308,8 +2305,9 @@ ia64_sigtramp_frame_prev_register (struct frame_info *this_frame, if (addr != 0) { - read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM)); - pc = extract_unsigned_integer (buf, 8, byte_order); + struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + pc = read_memory_unsigned_integer (addr, 8, byte_order); } pc &= ~0xf; return frame_unwind_got_constant (this_frame, regnum, pc); @@ -2490,12 +2488,11 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, int write, void *arg) { int regnum = ia64_uw2gdb_regnum (uw_regnum); - unw_word_t bsp, sof, sol, cfm, psr, ip; + unw_word_t bsp, sof, cfm, psr, ip; struct frame_info *this_frame = (struct frame_info *) arg; struct gdbarch *gdbarch = get_frame_arch (this_frame); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); long new_sof, old_sof; - gdb_byte buf[MAX_REGISTER_SIZE]; /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); @@ -2505,10 +2502,8 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, case UNW_REG_IP: /* Libunwind expects to see the pc value which means the slot number from the psr must be merged with the ip word address. */ - get_frame_register (this_frame, IA64_IP_REGNUM, buf); - ip = extract_unsigned_integer (buf, 8, byte_order); - get_frame_register (this_frame, IA64_PSR_REGNUM, buf); - psr = extract_unsigned_integer (buf, 8, byte_order); + ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM); + psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM); *val = ip | ((psr >> 41) & 0x3); break; @@ -2517,10 +2512,8 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, register frame so we must account for the fact that ptrace() will return a value for bsp that points *after* the current register frame. */ - get_frame_register (this_frame, IA64_BSP_REGNUM, buf); - bsp = extract_unsigned_integer (buf, 8, byte_order); - get_frame_register (this_frame, IA64_CFM_REGNUM, buf); - cfm = extract_unsigned_integer (buf, 8, byte_order); + bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); + cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm); *val = ia64_rse_skip_regs (bsp, -sof); break; @@ -2528,14 +2521,12 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, case UNW_IA64_AR_BSPSTORE: /* Libunwind wants bspstore to be after the current register frame. This is what ptrace() and gdb treats as the regular bsp value. */ - get_frame_register (this_frame, IA64_BSP_REGNUM, buf); - *val = extract_unsigned_integer (buf, 8, byte_order); + *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); break; default: /* For all other registers, just unwind the value directly. */ - get_frame_register (this_frame, regnum, buf); - *val = extract_unsigned_integer (buf, 8, byte_order); + *val = get_frame_register_unsigned (this_frame, regnum); break; } @@ -2570,12 +2561,11 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, int write, void *arg) { int regnum = ia64_uw2gdb_regnum (uw_regnum); - unw_word_t bsp, sof, sol, cfm, psr, ip; + unw_word_t bsp, sof, cfm, psr, ip; struct regcache *regcache = (struct regcache *) arg; struct gdbarch *gdbarch = get_regcache_arch (regcache); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); long new_sof, old_sof; - gdb_byte buf[MAX_REGISTER_SIZE]; /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); @@ -2585,10 +2575,8 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, case UNW_REG_IP: /* Libunwind expects to see the pc value which means the slot number from the psr must be merged with the ip word address. */ - regcache_cooked_read (regcache, IA64_IP_REGNUM, buf); - ip = extract_unsigned_integer (buf, 8, byte_order); - regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf); - psr = extract_unsigned_integer (buf, 8, byte_order); + regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip); + regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr); *val = ip | ((psr >> 41) & 0x3); break; @@ -2597,10 +2585,8 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, register frame so we must account for the fact that ptrace() will return a value for bsp that points *after* the current register frame. */ - regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf); - bsp = extract_unsigned_integer (buf, 8, byte_order); - regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf); - cfm = extract_unsigned_integer (buf, 8, byte_order); + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); + regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); sof = (cfm & 0x7f); *val = ia64_rse_skip_regs (bsp, -sof); break; @@ -2608,14 +2594,12 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, case UNW_IA64_AR_BSPSTORE: /* Libunwind wants bspstore to be after the current register frame. This is what ptrace() and gdb treats as the regular bsp value. */ - regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf); - *val = extract_unsigned_integer (buf, 8, byte_order); + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val); break; default: /* For all other registers, just unwind the value directly. */ - regcache_cooked_read (regcache, regnum, buf); - *val = extract_unsigned_integer (buf, 8, byte_order); + regcache_cooked_read_unsigned (regcache, regnum, val); break; } @@ -2982,12 +2966,10 @@ ia64_libunwind_frame_prev_register (struct frame_info *this_frame, { int rrb_pr = 0; ULONGEST cfm; - gdb_byte buf[MAX_REGISTER_SIZE]; /* Fetch predicate register rename base from current frame marker for this frame. */ - get_frame_register (this_frame, IA64_CFM_REGNUM, buf); - cfm = extract_unsigned_integer (buf, 8, byte_order); + cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); rrb_pr = (cfm >> 32) & 0x3f; /* Adjust the register number to account for register rotation. */ @@ -3229,7 +3211,7 @@ ia64_extract_return_value (struct type *type, struct regcache *regcache, float_elt_type = is_float_or_hfa_type (type); if (float_elt_type != NULL) { - gdb_byte from[MAX_REGISTER_SIZE]; + gdb_byte from[IA64_FP_REGISTER_SIZE]; int offset = 0; int regnum = IA64_FR8_REGNUM; int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); @@ -3294,7 +3276,7 @@ ia64_store_return_value (struct type *type, struct regcache *regcache, float_elt_type = is_float_or_hfa_type (type); if (float_elt_type != NULL) { - gdb_byte to[MAX_REGISTER_SIZE]; + gdb_byte to[IA64_FP_REGISTER_SIZE]; int offset = 0; int regnum = IA64_FR8_REGNUM; int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type); @@ -3856,7 +3838,7 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, len = TYPE_LENGTH (type); while (len > 0 && floatreg < IA64_FR16_REGNUM) { - gdb_byte to[MAX_REGISTER_SIZE]; + gdb_byte to[IA64_FP_REGISTER_SIZE]; convert_typed_floating (value_contents (arg) + argoffset, float_elt_type, to, ia64_ext_type (gdbarch));