[10/11] Add XTENSA_MAX_REGISTER_SIZE
Commit Message
> On 26 Apr 2017, at 10:59, Alan Hayward <Alan.Hayward@arm.com> wrote:
>
>
>> On 25 Apr 2017, at 16:39, Yao Qi <qiyaoltc@gmail.com> wrote:
>>
>> Alan Hayward <Alan.Hayward@arm.com> writes:
>>
I’ve rebased this patch due to Yao’s unit test changes.
XTENSA_MAX_REGISTER_SIZE is set to 64 to ensure nothing breaks.
I don't have a XTENSA machine to test on.
Tested on a --enable-targets=all and asan build using
make check with board files unix, native-gdbserver and unittest
Ok to commit?
Alan.
2017-06-08 Alan Hayward <alan.hayward@arm.com>
* xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add.
(xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE.
(xtensa_register_read_masked): Likewise.
Comments
Alan Hayward <Alan.Hayward@arm.com> writes:
> I don't have a XTENSA machine to test on.
> Tested on a --enable-targets=all and asan build using
> make check with board files unix, native-gdbserver and unittest
>
> Ok to commit?
>
> Alan.
>
> 2017-06-08 Alan Hayward <alan.hayward@arm.com>
>
> * xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add.
> (xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE.
> (xtensa_register_read_masked): Likewise.
Hi Maxim,
What do you think about this patch?
@@ -120,6 +120,9 @@ static unsigned int xtensa_debug_level = 0;
#define PS_WOE (1<<18)
#define PS_EXC (1<<4)
+/* Big enough to hold the size of the largest register in bytes. */
+#define XTENSA_MAX_REGISTER_SIZE 64
+
static int
windowing_enabled (struct gdbarch *gdbarch, unsigned int ps)
{
@@ -370,7 +373,7 @@ static void
xtensa_register_write_masked (struct regcache *regcache,
xtensa_register_t *reg, const gdb_byte *buffer)
{
- unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+ unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
const xtensa_mask_t *mask = reg->mask;
int shift = 0; /* Shift for next mask (mod 32). */
@@ -454,7 +457,7 @@ static enum register_status
xtensa_register_read_masked (struct regcache *regcache,
xtensa_register_t *reg, gdb_byte *buffer)
{
- unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+ unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
const xtensa_mask_t *mask = reg->mask;
int shift = 0;