diff mbox series

[PATCH/committed,05/20] sim: arm: fix -Wimplicit-fallthrough warnings

Message ID 20231221070127.19142-5-vapier@gentoo.org
State New
Headers
Series [PATCH/committed,01/20] sim: signal: mark signal callback funcs as noreturn since they don't return |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-arm fail Patch failed to apply

Commit Message

Mike Frysinger Dec. 21, 2023, 7:01 a.m. UTC 
  Replace some fall through comments with the attribute.
---
 sim/arm/armemu.c   | 6 +++---
 sim/arm/armos.c    | 1 +
 sim/arm/thumbemu.c | 7 ++++---
 sim/arm/wrapper.c  | 4 ++--
 4 files changed, 10 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index ab7454628ba0..2b8ae007cb56 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -4388,7 +4388,7 @@  check_PMUintr:
 		    ARMul_UndefInstr (state, instr);
 		  break;
 		}
-	      /* Drop through.  */
+	      ATTRIBUTE_FALLTHROUGH;
 
 	    case 0xc0:		/* Store , No WriteBack , Post Dec.  */
 	      ARMul_STC (state, instr, LHS);
@@ -4435,7 +4435,7 @@  check_PMUintr:
 		    ARMul_UndefInstr (state, instr);
 		  break;
 		}
-	      /* Drop through.  */
+	      ATTRIBUTE_FALLTHROUGH;
 
 	    case 0xc1:		/* Load , No WriteBack , Post Dec.  */
 	      ARMul_LDC (state, instr, LHS);
@@ -4622,7 +4622,7 @@  check_PMUintr:
 		  default:
 		    break;
 		  }
-	      /* Drop through.  */
+	      ATTRIBUTE_FALLTHROUGH;
 
 	    case 0xe0:
 	    case 0xe4:
diff --git a/sim/arm/armos.c b/sim/arm/armos.c
index 374861d7a5ec..6deb722d204d 100644
--- a/sim/arm/armos.c
+++ b/sim/arm/armos.c
@@ -832,6 +832,7 @@  ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
 	    }
 	  break;
 	}
+      ATTRIBUTE_FALLTHROUGH;
 
     default:
       unhandled = TRUE;
diff --git a/sim/arm/thumbemu.c b/sim/arm/thumbemu.c
index 6915d23ec4cc..99f51ef34691 100644
--- a/sim/arm/thumbemu.c
+++ b/sim/arm/thumbemu.c
@@ -308,7 +308,7 @@  handle_T2_insn (ARMul_State * state,
 	  * pvalid = t_branch;
 	  break;
 	}
-      /* Fall through.  */
+      ATTRIBUTE_FALLTHROUGH;
     case 0x42:
     case 0x43:
     case 0x47:
@@ -2261,7 +2261,7 @@  ARMul_ThumbDecode (ARMul_State * state,
 		    | ((tinstr & 0x0078) >> 3);	/* Rd */
 		  break;
 		}
-	      /* Drop through.  */
+	      ATTRIBUTE_FALLTHROUGH;
 	    default:
 	    case 0x0:		/* UNDEFINED */
 	    case 0x4:		/* UNDEFINED */
@@ -2415,7 +2415,7 @@  ARMul_ThumbDecode (ARMul_State * state,
 		* ainstr = 0xE1200070 | ((tinstr & 0xf0) << 4) | (tinstr & 0xf);
 	      break;
 	    }
-	  /* Drop through.  */
+	  ATTRIBUTE_FALLTHROUGH;
 	default:
 	  /* Everything else is an undefined instruction.  */
 	  handle_v6_thumb_insn (state, tinstr, next_instr, pc, ainstr, & valid);
@@ -2601,6 +2601,7 @@  ARMul_ThumbDecode (ARMul_State * state,
 	}
       /* else we fall through to process the second half of the BL */
       pc += 2;			/* point the pc at the 2nd half */
+      ATTRIBUTE_FALLTHROUGH;
     case 31:			/* BL instruction 2 */
       if (state->is_v6)
 	{
diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c
index 52b4dc7d6e09..8d928a6f79f9 100644
--- a/sim/arm/wrapper.c
+++ b/sim/arm/wrapper.c
@@ -251,7 +251,7 @@  sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED,
 	(sim_callback,
 	 "Unknown machine type '%d'; please update sim_create_inferior.\n",
 	 mach);
-      /* fall through */
+      ATTRIBUTE_FALLTHROUGH;
 
     case 0:
       /* We wouldn't set the machine type with earlier toolchains, so we
@@ -310,7 +310,7 @@  sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED,
 	  ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
 	  break;
 	}
-      /* Otherwise drop through.  */
+      ATTRIBUTE_FALLTHROUGH;
 
     case bfd_mach_arm_5T:
       ARMul_SelectProcessor (state, ARM_v5_Prop);